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planeetmaa
planeetmaa
Associate III
February 19, 2009
Question

FSMC in multiplexed mode

  • February 19, 2009
  • 1 reply
  • 569 views
Posted on February 19, 2009 at 12:07

FSMC in multiplexed mode

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    1 reply

    planeetmaa
    planeetmaaAuthor
    Associate III
    May 17, 2011
    Posted on May 17, 2011 at 13:03

    Hi!

    I have question about FSMC controller. Im planning to use it in multiplexed mode to communicate to memories. I have STM103 in 144 pin package, but need the pins elsewhere.

    The question is: If I configure memory interface according to ''mode muxed- asynchronous access to muxed NOR flash'' in reference manual (with the help of D-latch), does the controller allow 8 bit access to 16 bit wide memory? I mean if I connect 16 bit SRAM in that mode, does the controller use NBL0 and NBL1 signals? At least they are not shown in timing diagram in that mode... Or can I specify memory type as SRAM and enable address multiplexing in FSMC_BCRx register (this kind of timing diagram is missing, at least)?

    Thank you,

    Madis

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