Frquency of Timer1,8 and Timer 2,3,4,5,6,7

[panchal_jayesh_m]

Posted on October 10, 2009 at 14:58

Frquency of Timer1,8 and Timer 2,3,4,5,6,7

[panchal_jayesh_m]

Posted on May 17, 2011 at 13:25

Hi I am jayesh.

I had made a program to generate PWM on Timer3 channel1 from example taken from ST website.

Code is like this

/* -----------------------------------------------------------------------

TIM3 Configuration: generate 4 PWM signals with 4 different duty cycles:

TIM3CLK = 36 MHz, Prescaler = 0x0, TIM3 counter clock = 36 MHz

TIM3 ARR Register = 999 => TIM3 Frequency = TIM3 counter clock/(ARR + 1)

TIM3 Frequency = 36 KHz.

TIM3 Channel1 duty cycle = (TIM3_CCR1/ TIM3_ARR)* 100 = 50%

TIM3 Channel2 duty cycle = (TIM3_CCR2/ TIM3_ARR)* 100 = 37.5%

TIM3 Channel3 duty cycle = (TIM3_CCR3/ TIM3_ARR)* 100 = 25%

TIM3 Channel4 duty cycle = (TIM3_CCR4/ TIM3_ARR)* 100 = 12.5%

----------------------------------------------------------------------- */

/* Time base configuration */

TIM_TimeBaseStructure.TIM_Period = 999;

TIM_TimeBaseStructure.TIM_Prescaler = 0;

TIM_TimeBaseStructure.TIM_ClockDivision = 0;

TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;

TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure);

/* PWM1 Mode configuration: Channel1 */

TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;

TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;

TIM_OCInitStructure.TIM_Pulse = CCR1_Val;

TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;

TIM_OC1Init(TIM3, &TIM_OCInitStructure);

TIM_OC1PreloadConfig(TIM3, TIM_OCPreload_Enable);

in that wriiten that pwm frquency is of 36KHz. But it is 72KHz.

Please help me to solve the confusion.

[panchal_jayesh_m]

Posted on May 17, 2011 at 13:25

The original post was too long to process during our migration. Please click on the provided URL to read the original post. https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I6Yn&d=%2Fa%2F0X0000000bqi%2FycJ86oT0UcZ0oqEnsKPKHWvP4vBsO2ipouGmOjptsjg&asPdf=false

[swhite]

Posted on May 17, 2011 at 13:25

You need to know how the APB clocks are configured. See figure 11 (Clock Tree) in the Reference manual.

In short

Timer 1 is clocked by PCLK2 (APB2 prescaler)

APB2 prescale 1x => TIM1CLK = PCLK2

APB2 prescale 2x-16x: TIM1CLK = 2x PCLK2

Timers 2-8 are clocked by PCLK1 (APB1 prescaler)

APB1 prescale 1x: TIM2CLK-TIM8CLK = PCLK1

APB1 prescale 2x-16x: TIM2CLK-TIM8CLK = 2x PCLK1

[akaiser9]

Posted on May 17, 2011 at 13:25

Timer clocking is ideed a bit confusing, because the timers are not implicitly clocked by the corresponding APB clock. It's a little more complicated.

Assuming a system clock rate of 72MHz, the timers are clocked at 72MHz even when the corresponding APB is clocked at 36MHz. As described above, the timers are clocked at twice the APB clock rate unless the APB clock divider is 1.

[panchal_jayesh_m]

Posted on May 17, 2011 at 13:25

So, tell me that you are confusing about my question or description of timer in refernce manual?

swhite if you have your personal mail id then give me your mail id then we can talk on mail.

Please tell me solution if you found. 8-)

[ This message was edited by: panchal_jayesh_m on 10-10-2009 13:02 ]

[swhite]

Posted on May 17, 2011 at 13:25

Quote:

So i am confusing that if max. frequency of APB1 is 36 MHz then how the calculated frequency is half of th actual.

Again, you must know how the APB prescaler is configured. See RCC_Configuration() in the example code.

If the APB1 prescale is set to /2 though /16 the timer clock is

PCLK / prescale x 2

So if PCLK is 72MHz and APB1 prescale is set to /2 (to keep it <= 36MHZ) the actual timer frequency is 72 /2 * 2 = 72MHZ!