Fixed version of Cortex in STM32H7 ?

[Gpeti]

Hello,

I've heard that some bugs have been found on Cortex M7 related to cache management, and that the STM32H7 will embed the fixed version of Cortex design. But I can't find when this updated version of STM32H7 will be available. Also, where (in what document) is the ARM Cortex M7 design revision specified ?

Regards

[Max]

The correct place to look for this type of information is the product errata-sheet.

but it won't show you future/planned silicon revision until they become available.

if you need more information about products or revisions that are not yet available, you must to ask your local ST contact.

[Tesla DeLorean]

H7xx r1p1

CPUID 411FC271 DEVID 450 REVID 1001 Cortex M7 r1p1

CPUID 411FC271 DEVID 450 REVID 1003 Cortex M7 r1p1 STM32H7xx Rev Y

I don't have my Rev V to hand, but I think that's the same r1p1 core. Will check later

>>Also, where (in what document) is the ARM Cortex M7 design revision specified ?

Try the Reference Manual or the Errata

[Gpeti]

Hello, the errata sheet mentions that the bugs of version r0p1 are present on all versions of STM32H753, so I'm surprised that you mention r1p1 ?

[Tesla DeLorean]

I've tracked this stuff pretty comprehensively, definitely reporting r1p1

https://static.docs.arm.com/ddi0489/d/DDI0489D_cortex_m7_trm.pdf

https://community.st.com/s/question/0D50X0000AnssYLSQY/how-can-i-check-the-revision-of-the-m7-core-without-checking-the-registers

ST's only used r0p1 in the first generation CM7 parts the F746/F756/F750

[Gpeti]

​Thank you Clive, it's quite helpful as I don't have a Nucleo up and running yet. So the errata sheet is wrong for this product (at least for the core version). 

[Piranha]

STM32H7: AN4891 section 2.6.

STM32F7: AN4667 section 1.7.

Real bugs with cache management are in ST's software. Their code monkeys are not able to understand cache management, multi-threading, full-duplex communication, asynchronous events, memory barriers and even optimal use of local/volatile variables.

[Gpeti]

​AN4891 is not a document but a software expansion X-CUBE-PERF-H7. Typo ?

ARM describes some real hardware bugs related to cache, including on the r1p1, and this is what my company is concerned about. I don't see the link with potential software bugs from ST.