F091_Cube_FW: Connect a wire between PA4 and PA4...

[JuM]

Posted on July 05, 2018 at 14:49

Diving into STM32F091 Nucleo  Examples (STM32Cube_FW_F0_V1.9.0).

Trying ADC Sequencer and find this comment in main.c:

#if defined(WAVEFORM_VOLTAGE_GENERATION_FOR_TEST)

/**

  * @brief  For this example, generate a waveform voltage on a spare DAC

  *         channel, so user has just to connect a wire between DAC channel

  *         (pin PA.04) and ADC channel (pin PA.04) to run this example.

  *         (this prevents the user from resorting to an external signal generator)

  *         This function configures the DAC and generates a constant voltage of Vdda/2.

  *         To modify the voltage level, use function 'WaveformVoltageGenerationForTest_Update'

  * @param  None

  * @retval None

  */

static void WaveformVoltageGenerationForTest_Config(void)

Besides being unable to connect PA4 with PA4 (DACOUT1 and ANIN4 are both at PA4), two questions:

   - Is there any detailed structure doc of e.g. STM32F091 pin PA4 (AIN4 and DACOUT1) regarding ADC and DAC ?

   - Is it possible to read a DAC back via AIN if they share the same pin (PA4 in my case)?

Juergen

[waclawek.jan]

Posted on July 05, 2018 at 15:16

[CubeF0]\Projects\STM32F091RC-Nucleo\Examples\ADC\ADC_Sequencer\readme.txt says:

   If ADC channel and DAC channel are selected on the same GPIO (default configuration

   in this example):

   connection is done internally in GPIO pad, user has nothing to connect.

JW

[JuM]

Posted on July 06, 2018 at 08:06

This should go into the Reference Manual...

[waclawek.jan]

Posted on July 06, 2018 at 09:02

Wholeheartedly agree.

The STM32s came to be in the same way as all modern highly integrated digital electronics does: by stitching together modules. The RM reflects this, leaving the &39stitches&39 (i.e. the places where modules interact closely or have direct (other than through the bus system) mutual connections) described rather weakly.

In newer STM32s&39 RMs (e.g. the &39L4) there&39s an Interconnection chapter, even if those still leave many important issues unaddressed - e.g. I doubt such ADC-DAC interaction or

https://community.st.com/0D50X00009XkaBBSAZ

interaction

https://community.st.com/0D50X00009XkVvOSAV

beyond the GPIO module is mentioned in any of them. I was already suggesting here several times to put this into the older families&39 RMs too.

JW