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AMerc.4
Senior
May 5, 2020
Question

External SDRAM with STM32F767 Nucleo board

  • May 5, 2020
  • 18 replies
  • 4326 views

Hello,

i bought this SDRAM and i connected it to my STM32F767 Nucleo board. My init function is

static void MX_FMC_Init(void)
{
 
 /* USER CODE BEGIN FMC_Init 0 */
 
 /* USER CODE END FMC_Init 0 */
 
 FMC_SDRAM_TimingTypeDef SdramTiming = {0};
 
 /* USER CODE BEGIN FMC_Init 1 */
 
 /* USER CODE END FMC_Init 1 */
 
 /** Perform the SDRAM1 memory initialization sequence
 */
 hsdram1.Instance = FMC_SDRAM_DEVICE;
 /* hsdram1.Init */
 hsdram1.Init.SDBank = FMC_SDRAM_BANK1;
 hsdram1.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8;
 hsdram1.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_13;
 hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_8;
 hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
 hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_3;
 hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
 hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2;
 hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_DISABLE;
 hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_1;
 /* SdramTiming */
 SdramTiming.LoadToActiveDelay = 2;
 SdramTiming.ExitSelfRefreshDelay = 8;
 SdramTiming.SelfRefreshTime = 4;
 SdramTiming.RowCycleDelay = 7;
 SdramTiming.WriteRecoveryTime = 3;
 SdramTiming.RPDelay = 2;
 SdramTiming.RCDDelay = 2;
 
 if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK)
 {
 Error_Handler( );
 }
 
 /* USER CODE BEGIN FMC_Init 2 */
 
 /* USER CODE END FMC_Init 2 */
}

but my memory manager doesn't read it. However, if i put into this function a custom user code such as

FMC_SDRAM_CommandTypeDef Command;
 
/* Step 1: Configure a clock configuration enable command */
Command.CommandMode = FMC_SDRAM_CMD_CLK_ENABLE;
Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
Command.AutoRefreshNumber = 1;
Command.ModeRegisterDefinition = 0;
 
/* Send the command */
HAL_SDRAM_SendCommand(&hsdram1, &Command, 60);

i can read my SDRAM both at 0xC0000000 and 0xD0000000. However, if i put this code in the main

uint32_t *externalRAM = 0xC000000;
const uint32_t size = 1000;
 
//write external RAM
for(int i = 0; i < size; i++)
{
 externalRAM[i] = i;
}

i can't see any difference.

This topic has been closed for replies.

18 replies

TDK
May 5, 2020

> uint32_t *externalRAM = 0xC000000;

Probably want to write to 0xC0000000 and not 0x0C000000.

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AMerc.4
AMerc.4Author
Senior
May 5, 2020

You are right. But the problem persists. If i write to 0x20000000 it works:

0x20000000 00000000 00000001 00000002 00000003 00000004 00000005 00000006 ............................
0x2000001C 00000007 00000008 00000009 0000000A 0000000B 0000000C 0000000D ............................
0x20000038 0000000E 0000000F 00000010 00000011 00000012 00000013 00000014 ............................
0x20000054 00000015 00000016 00000017 00000018 00000019 0000001A 0000001B ............................
0x20000070 0000001C 0000001D 0000001E 0000001F 00000020 00000021 00000022 ................ ...!..."...
0x2000008C 00000023 00000024 00000025 00000026 00000027 00000028 00000029 #...$...%...&...'...(...)...
0x200000A8 0000002A 0000002B 0000002C 0000002D 0000002E 0000002F 00000030 *...+...,...-......./...0...
0x200000C4 00000031 00000001 00000033 00000034 00000035 00000036 00000037 1.......3...4...5...6...7...
0x200000E0 00000038 00000039 0000003A 0000003B 0000003C 8...9...:...;...<...

but if i insert it to 0xC0000000:

0xC0000000 CFCFCFCF CFCFCFCF DFCFCFCF CFCFCFCF CFCFCFCF CFCFCFCF CFCFCFCF �?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?
0xC000001C CFCFCFCF CF8FCFCF 8F8F8FCF CFCF8F8F CF8FCF8F CFCFCFCF CFCFCFCF �?�?�?�?�?�?.�?�?.....�?�?.�?.�?�?�?�?�?�?�?�?�?
0xC0000038 CFCFCFCF CFCFCFCF CFCFCFCF CFCFCFCF CFCFCFCF CFCFCFCF CFCFCFCF �?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?
0xC0000054 CFCFCFCF CFCFCFCF CFCFCFCF CFCFCFCF FFFFFFFF FFFFFFFF FFFFFFFF �?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?ÿÿÿÿÿÿÿÿÿÿÿÿ
0xC0000070 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F ............................
0xC000008C 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F ............................
0xC00000A8 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F ............................
0xC00000C4 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F ............................
0xC00000E0 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F 7F7F7F7F ............................
0xC00000FC ???????? ????

Piranha
Principal III
May 6, 2020

And how is this physically connected to the Nucleo? At what frequency? Does it respect the impedance and other high frequency signal requirements?

AMerc.4
AMerc.4Author
Senior
May 6, 2020

I soldered it to a breakout board, which is connected to the Nucleo board through 15cm wires. I setted the HCLK frequency to 200 MHz, so the SDRAM frequency runs at 100 MHz frequency.

TDK
May 6, 2020

I wouldn't count on 100 MHz making it through 15cm wires without issue. 0xCF and 0x8F are one bit apart. I bet your signal is just distorted.

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AMerc.4
AMerc.4Author
Senior
May 6, 2020

So, what do you suggest to me? Should i reduce the SDRAM frequency?

TDK
May 6, 2020

Yes, I would bring SDRAM frequency down to around 10 MHz or so and see if it works and go from there.

I don't know if SDRAM has a minimum frequency or not. Probably not, but I don't have a ton of experience there.

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AMerc.4
AMerc.4Author
Senior
May 7, 2020

I don't know what are the timing parameters to set with 10 MHz. I can find exit self refresh delay parameter in nanoseconds (70 ns) in the datasheet, which at 10 MHz is 1 clock cycle (right?). but tghe others?

Tesla DeLorean
Guru
May 7, 2020

Attach as a complete/compilable project. Enumerate pin usage.

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AMerc.4
AMerc.4Author
Senior
May 7, 2020

How can i attach it? Do you want only the main.c file?

Piranha
Principal III
May 7, 2020

There is a reason why noone does it like that - it's called physics. You can try lowering the frequency as low as possible and using PATA cable or similar, but take a note that they introduced 80-wire cable (with every other line being ground) for 33 MHz connections.

AMerc.4
AMerc.4Author
Senior
May 7, 2020

Yes i know that this is not the best way to cennect it. But i don't know any way to connect it to my nucleo board.

berendi
Principal
May 7, 2020

There is no minimum SDRAM clock frequency listed in the datasheet, but keep in mind that the refresh rate should be adjusted accordingly. See the description of the SDRAM Refresh Timer register (FMC_SDRTR) in the reference manual.

MEdgerton
Associate III
June 29, 2020

Hi, I'm looking at adding sram to my nucleo-F767 to test some ideas.

Did you fix this as its always good to start from a known good design.

To confirm you are using IS42/45S16160J from your link?

I noticed the line hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_8;

But the device above is configured as ​4M x16x4 Banks. The other device on the dataset (not the part number you listed) appears to have an 8 bit data bus.

Does this explain the issue?

I look forward to hearing back.

Thanks,

Mark​

AMerc.4
AMerc.4Author
Senior
August 7, 2020

Hello, i subsequently changed the sdram to one more supported by examples, like MT48LC16M16A2P

https://lcsc.com/product-detail/SDRAM_Micron-Tech-MT48LC16M16A2P-6A-IT-G_C26393.html

MEdgerton
Associate III
August 7, 2020

Hi,

Thanks for the reply. I have actually just got the original device working and also have it mapped into normal IO space (so you don't have to make HAL calls to access it. I have ade it so it forces certain parts (data logging) to be stored in the external SDRTAM and the main in the on chip.

Interestlingly I managed over 100MHz with short lengths of wire (about 4cm) I wasn;t expecting that much speed. I havent had time to push it further as PCB next.

I did run many tests on it and could demonstrate they caused a fail properly when expected.

I see the part you listed has less space, and have you links to the examples you mention for future reference.

If you'd like to know more of what I have done, please ask!

Mark