Execute nLog(n) algorithm in real time

[Pkats.1]

Hey,

I am planning an algorithm that needs to work in Real time.

The system includes an ADC that samples in rate of 5Msps and the interface with the CPU is 80MHz in SPI.

From  primary calculation the running time Complexity is O(n log n), and the result is around 15M operations is one sec.

As we know, the f(CPU) 480/400 MHz Max.

How can I be sure that the CPU can handle 15M operations in Real time?

What is the number of cycles each operation takes, if we will assume that the operation is multiply between two 16bit words and Summing the result.

Best Regards

Peleg

[waclawek.jan]

> How can I be sure that the CPU can handle 15M operations in Real time?

Benchmark, i.e.try. Read as much of available material on the ARM core, bus structure, behaviour of memories, caches etc. as possible, simultaneously testing their impact on your code.

Make sure there are no other computational/data transfer intensive tasks, e.g. high-speed communication (USB, ETH) or picture display, interfering.

JW

[TDK]

> What is the number of cycles each operation takes

ARM lists the clocks per operation code. For the -M4 and lower, it's straightforward, minus waiting for flash if applicable. For the -M7 it's a bit more complex (but generally much faster).

If you really are running only 15M assembly operations/sec, the CPU will have no problem handling this at 480MHz. Typical instructions take 1-3 cycles. Make sure ICache and DCache is enabled.

Unless you program it in assembly, execution speed will depend on how the compiler decides to work.

Best way to do so would be to profile the code as jan suggests.

[S.Ma]

Some STM32 have assisted co-pro like Cordic or FMAC which could affect performance if used.

Running the time critical code in RAM (and putting interrupts there too) would also help on top of compiler tricks