Error in RM0432 Rev 9 for MCOSEL[3:0]: Microcontroller clock output ? EDIT: Sorry, no error in the manual.

[Nikita91]

In the manual P 263:

Bits 27:24 MCOSEL[3:0]: Microcontroller clock output
Set and cleared by software.
0000: MCO output disabled, no clock on MCO
0001: SYSCLK system clock selected
0010: MSI clock selected.
0011: HSI16 clock selected.
0100: HSE clock selected
0101: Main PLL clock selected
0110: LSI clock selected
0111: LSE clock selected
1000: Internal HSI48 clock selected

But the real order is

0000: MCO output disabled, no clock on MCO
0001: LSE clock selected
0010: LSI clock selected
0011: HSE clock selected
0100: HSI16 clock selected.
0101: Main PLL clock selected
0110: SYSCLK system clock selected
0111: MSI clock selected.
1000: HSI48 clock selected

This is the order in the CubeMX mux setting for the MCO output.

[waclawek.jan]

@Nikita91​ ,

Are you sure the order in CubeMX also implies value of the bitfield?

https://github.com/STMicroelectronics/STM32CubeL4/blob/5223f4b55990987748dfc523ed751bc0c938650e/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h#L503

JW

[Nikita91]

I'm only saying that the order in CubeMX matches what I observe on pin PA8.

When I put 1 in the RCC->CFGR / RCC_CFGR_MCOSEL field, I get a frequency of 32768 and not 120MHz.

I think the people who wrote the HAL followed the RM, the people who did MX followed the hardware specification.

[waclawek.jan]

> When I put 1 in the RCC->CFGR / RCC_CFGR_MCOSEL field, I get a frequency of 32768 and not 120MHz.

That sounds convincing indeed.

I would like to confirm, but don't have an 'L4+ at hand... :(

JW

[Piranha]

If this is true, it could be the same for L4 series. I'll test it on L432 and report.

[Nikita91]

Sorry...

I misread my own code from a few years ago.

There is no error in the manual.

[waclawek.jan]

Thanks for coming back with the solution.

You may perhaps select your post as Best so that thread is marked as solved.

JW