Enable Interrupt for Blue Button on NucleoF411

[noah]

Posted on February 21, 2015 at 18:14

Hello,

i have a Problem or misunderstanding enabling the Interrupts for the blue button on the nucleof411 board. In short: The Interrupt is only raised when i enable

EXTI15_10_IRQn, EXTI9_5_IRQn and EXTI4_IRQn alltogether. If i enable only irq exti15_10 nothing happens (the isr is not called).

My test-code:

// 

// blue button 

// 


rcc_enable_gpioc(); 


gpio_config( 

devices.gpioc, 

GPIO_PIN_13, 

GPIO_MODE_INPUT, 

GPIO_OUTPUTTYPE_PUSHPULL, 

GPIO_OUTPUTSPEED_LOW, 

GPIO_PULL_PULLDOWN, 

GPIO_ALTERNATEFUNCTION_0 

); 


// 

// enable external irq for the button on pin 13 

// 


rcc_enable_syscfg(); 


syscfg_config(SYSCFG_PIN13, SYSCFG_EXTERNALINTERRUPT_PORTC); 


exti_config( 

EXTI_LINE13, 

EXTI_INTERRUPT_ENABLED, 

EXTI_EVENT_DISABLED, 

EXTI_RISINGTRIGGER_ENABLED, 

EXTI_FALLINGTRIGGER_DISABLED 

); 


nvic_enable(EXTI15_10_IRQn); 

nvic_enable(EXTI9_5_IRQn); 

nvic_enable(EXTI4_IRQn);

In the ISR onlyIRQ 56 is raised.

// quick n dirty, just to test 

// the Interrupt vector table uses only this function! 


void 

interrupts_interruptrequest() 

{ 

uint32_t r = devices.scb->device->ICSR.VECTACTIVE; 

// r is always 56 !! 


if( r==56 ) 

{ 

gpio_toggle(devices.gpioa, GPIO_PIN_5); 

devices.exti->device->pending.s.line13 = 1; 

} 

} 

Any ideas??

Thank you Noah #nucleof411-nvic-interrupts

[noah]

Posted on February 25, 2015 at 18:21

ok, it was a misunderstanding:

i used a wrong offset to set a bit in the ISER Register because i thought each bit in the ISER belongs to an irq depending on the Position of the bit ie bit 56 is for irq 56. 

thats wrong as stated in arm docs:

ICSR.VECTACTIVE contains the interrupt number of the currently running ISR, including NMI and Hard Fault.

A shared handler can use VECTACTIVE to determine which interrupt invoked it.

You can subtract 16 from the VECTACTIVE field to index into the Interrupt Clear / Set Enable,

Interrupt Clear Pending / SetPending and Interrupt Priority Registers.

INTISR[0] has vector number 16.

short example:

EXTI15_10_IRQn

= number 40 in IRQn_Type in [mcu].h

= bit 40 in ISER

= irq handler 56 in vector table

= 56 in ICSR.VECTACTIVE

now, one call

nvic_enable_interrupt(EXTI15_10_IRQn) enables the irq as expected.

hope its helpfull if someone has a similar Problem

noah

[Tesla DeLorean]

Posted on February 25, 2015 at 19:51

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