Duty cycle on Timers

[BILLyTheLiTTle]

I was reading in "Mastering STM32" and in the intro of PWM pulses (pg355 hard copy) said that "The square waves generated until now have all one common characteristic: they have a Ton period equal to the Toff one. For this reason they are also said to have a 50% duty cycle."

But according to RM0090 at pg. 521 and Figures 89-91 the UEV happens once the counter is equal to Period (ARR) value.

So, theoretically speaking, if I set the ARR value to 4, handle the interrupt from the UEV and toggle a pin by code, does it mean that I have just created 25% duty cycle signal? Let's say that I don't care in creating a signal at 90% (stick with this single example, 25%) duty cycle and I don't care about the extra CPU load I create.

If yes, then why do we say that only PWM signal can vary in duty cycle?

If no, could you explain what I missed from the photos I referenced from RM0090?

Thank you in advance,

Using the processor (interrupts etc.) you can definitely make any kind of waveform, not only PWM type signals. But the speed will be limited by processor.

The timers' PWM mode doesn't involve the processor, hence much faster.