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Charlie CHEN
Associate III
November 15, 2024
Question

DSI Host Error Handler

  • November 15, 2024
  • 6 replies
  • 1384 views

Hi, 

 

I`m new to MIPI DSI, and still learn how to use it.

Recently, I develop with my custom board and start with MIPI interface display. Then config with CUBEMX, but after compile program, it always stuck in HAL_DSI_Iinit  while loop below

 

 

 

 

 

 /* Get tick */
 tickstart = HAL_GetTick();
 if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
 {
 while ((hdsi->Instance->PSR & (DSI_PSR_PSS0 | DSI_PSR_PSSC)) != (DSI_PSR_PSS0 | DSI_PSR_PSSC))
 {
 if ((HAL_GetTick() - tickstart) > DSI_TIMEOUT_VALUE)
 {
 /* Process Unlocked */
 __HAL_UNLOCK(hdsi);

 return HAL_TIMEOUT;
 }
 }
 }

 

 

CharlieCHEN_1-1731650023707.png

 

 

 

I follow the AN4860 to setting the same method with my MIPI display.

Is any suggestion to solve this problem?

 

Thanks for any help!

 

This topic has been closed for replies.

6 replies

ST Technical Moderator
November 15, 2024

Hello @Charlie CHEN ,

Which STM32 board used?

I advise you run the ready-to-use DSI example, this will help you on the configuration. 

Check the DSI clock, try maybe to decrease it.

In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question. Thanks
Charlie CHEN
Associate III
November 15, 2024

Hi. @Imen.D 

Thanks for your reply.

My custom board is designed with STM32U599.

 

Can you advise the suitable DSI Clock that I can reference?

And I download STM32U5A9J-DK example to see what different, but still no solution.

 

Additional, in the function, it`ll never pass the while loop.

PSR  = 0x1528

DSI_PSR_PSS0 = 0x10

DSI_PSR_PSSC = 0x04

line here,

while ((hdsi->Instance->PSR & (DSI_PSR_PSS0 | DSI_PSR_PSSC)) != (DSI_PSR_PSS0 | DSI_PSR_PSSC))
 {
 if ((HAL_GetTick() - tickstart) > DSI_TIMEOUT_VALUE)
 {
 /* Process Unlocked */
 __HAL_UNLOCK(hdsi);

 return HAL_TIMEOUT;
 }
 }

 

Is any possibility of wrong setting will cause the problem?

 

Thanks

 

ST Technical Moderator
November 15, 2024

The DSI clock should be derived from the clock tree PLL3.PLLP (ck_plldsi) clock for instance to allow a switch-off of the PLL DPHY to save power during the ULPM phase.

You can find more information about the clock configuration in the README.md.

Also, check the timing configuration and the pixel clock configuration from the Datasheet.

Note that the LTCD_CLK must be calculated using the parameters from the display datasheet.

STM32CubeU5/Projects/STM32U5x9J-DK/Examples/DSI/DSI_ULPM_DataClock/README.md at main · STMicroelectronics/STM32CubeU5 · GitHub

Check the pin configuration and if you are using pins swapped or you have signals inverted.

In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question. Thanks
Charlie CHEN
Associate III
November 15, 2024

Hi @Imen.D 

This is my MIPI display timing parameter.

CharlieCHEN_0-1731661427293.png

And LTDC Timing setting.

CharlieCHEN_1-1731661476596.png

CharlieCHEN_2-1731661510891.png

Is there something I missed?

 

Thanks

Charlie CHEN
Associate III
November 18, 2024

Hi,

 

I have been stuck for couple days.

Is anyone can help?

 

Thanks