Driving PLL using internal oscillator in stm32f030

[sanjib]

Posted on July 31, 2014 at 11:41

The system clock of stm32f030c8t6 is 48 mhz ....I want to achieve the maximum frequency by using internal osc (8 Mhz) driving the PLL insread of external Osc. I was able to achieve with the help of external osc....How can I achieve using Internal osc (PLL(HSI)).

Please help

[ivani]

Posted on July 31, 2014 at 15:59

The PLL could use HSI/2 as input (PLLSRC = 0 in RCC_CFGR). Then you need to select PLLMUL=10 (PLL multiplier x12) in the same register.

[Tesla DeLorean]

Posted on July 31, 2014 at 18:25

static void SetSysClock(void)
{
/* Enable Prefetch Buffer and set Flash Latency */
FLASH->ACR = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY;
/* HCLK = SYSCLK */
RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
/* PCLK = HCLK */
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE_DIV1;
/* PLL configuration = HSI/2 * 12 = 48 MHz */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSI_Div2 | RCC_CFGR_PLLMULL12);
/* Enable PLL */
RCC->CR |= RCC_CR_PLLON;
/* Wait till PLL is ready */
while((RCC->CR & RCC_CR_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)
{
}
}