Does stm32g473 support multiple concurrent I2C ports? uC has 4 I2C devices mux'd to unique port pins but appears to have only 1 ISR register for all. This application both I2C devices are slaves and may be accessed concurrently.

[GBrow.3]

..

[TDK]

> Does stm32g473 support multiple concurrent I2C ports? 

Yes. Each peripheral is independent.

> uC has 4 I2C devices mux'd to unique port pins but appears to have only 1 ISR register for all.

Where are you seeing this?

[GBrow.3]

Thanks for your reply. I had previously seen the registers listed in RM0440 section 41.7.7 representing an example instance of the I2C registers and no mention of concurrent usage of these devices.

But, after your response I found Table 3. STM32G4 Series memory map and peripheral register boundary addresses that shows 1k byte for each device instance. So I agree - control and ISR/data registers are available per peripheral instance.

Small amount of additional reading in my future.

[Tesla DeLorean]

I'd expect each I2Cx instance to have it's own set of registers and related handlers.

RM typically describes the register bank for a single instance, that is stepped-and-repeated, it's not an 8051 where every register in the design is re-described for each instance.

        DCD   I2C1_ER_IRQHandler        ; I2C1 Error

        DCD   I2C1_EV_IRQHandler        ; I2C1 Event

        DCD   I2C2_ER_IRQHandler        ; I2C2 Error

        DCD   I2C2_EV_IRQHandler        ; I2C2 Event

        DCD   I2C3_ER_IRQHandler        ; I2C3 Error

        DCD   I2C3_EV_IRQHandler        ; I2C3 Event

        DCD   I2C4_ER_IRQHandler        ; I2C4 error

        DCD   I2C4_EV_IRQHandler        ; I2C4 event

[GBrow.3]

Yes, very different from those earlier uC generations, the STM32G4 RM would be much too large! Finding reasonable key words for searching a doc like the RM0440 is part of the problem.

[TDK]

Yes, I think you've figured it out.

It is inconsistent in the RM that sometimes registers have an "x" in them to denote that they are per-peripheral or per-channel or per-whatever, while other times they do not.

Timer registers are TIMx_*** in the manual:

 

While I2C registers are not:

 

I can see that being confusing. After looking at RMs enough you just gloss over that part of it. Not saying it shouldn't be improved.