Does SPI in slave mode threestate MISO on inactive NSS, or not?

[waclawek.jan]

Posted on May 17, 2017 at 23:22

This is a followup to

https://community.st.com/thread/40921-multi-slave-spi-using-stm32f7s&sharpcomment-157367

.

RM0385, requests MISO being set to open-drain when multiple slaves are connected. This indicates, that NSS set to the inactive state *does not* threestate MISO in STM32 SPI set to slave, as is the custom with SPI. This makes using multiple STM32 SPI slaves not practical.

Other than this, I could not find any indication of MISO behaviour in this regard in the RM.

I also went to the respective datasheet and the graph indicates that MISO *does* threestate when NSS goes inactive:

The STM32F40x DS, in the same table, for the same parameter, the footnote clearly states that MISO is to be threestated (put to Hi-Z)

ST, please comment.

Jan Waclawek

null

[Petr Sladecek]

Posted on May 18, 2017 at 13:03

Hello,

MISO signal output is under standard chip select control of NSS input when the SPI slave is enabled and configured at HW NSS mode with NSS output disabled (SPE=1, SSM=0 nad SSOE=0). This allows multi-slave star topology communication.

Best regards,

Petr