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anonymous.8
Senior II
March 12, 2017
Solved

Does anyone know how to find out the Core revision number?

  • March 12, 2017
  • 3 replies
  • 3870 views
Posted on March 12, 2017 at 17:12

Hi. I have an STM32F746 Discovery board purchased late last year from Digi-Key. It uses a STM32F746NG chip. I have not found any documentation anywhere that defines which revision of the Cortex M-7 core it uses. I am programing using FreeRTOS and its portability layer has a port.c function for the CM-7 core revision r0p1. I see the latest (but still dated 2015) ARMCortex-M7 Processor Technical Reference Manual  is Revision r1p0 which presumably is later than revision r0p1.

How do I find out what revision the core is in any particular STM ARM chip?

Thanks.

    This topic has been closed for replies.
    Best answer by Imen.D
    Posted on March 13, 2017 at 11:29

    Hi,

    As mentioned by Clive One, you may find more details in the

    http://www.st.com/content/ccc/resource/technical/document/errata_sheet/4d/39/a6/8c/84/47/47/67/DM00145382.pdf/files/DM00145382.pdf/jcr:content/translations/en.DM00145382.pdf

     :0690X00000606YiQAI.png

    3 replies

    Tesla DeLorean
    Guru
    March 12, 2017
    Posted on March 12, 2017 at 20:58

    I have a decoder for this and the FPU variant, but not near the system it is on

    http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0489d/Cihhbddh.html

     

    SCB->CPUID  <- check this register

     

    DBGMCU->IDCODE

     

     

    https://community.st.com/0D50X00009XkaRrSAJ

     
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    anonymous.8
    Senior II
    March 13, 2017
    Posted on March 13, 2017 at 00:04

    Clive, thanks for the info. on the SCB->CPUID register. It is documented, as I found out, in the PM0253 Cortex-M7 Programming  manual. By the time I read your second post here I had already written a routine to recover the rnpn number.

    And I discovered that it is r0p1 for the STM32F746NG chip as used in the STM746 Discovery kit. One of the links you gave above mentioned they thought that STM had only licensed the r0p1 core from ARM.

    Thanks to all who have posted.

    Tesla DeLorean
    Guru
    March 13, 2017
    Posted on March 13, 2017 at 00:30

    One of the threads went through a couple of edits, but the NUCLEO-F767 had the r1p0 part, the FPU-D and 2MB of FLASH

    The FPU-S devices probably just going to be the r0p1 core, unless ST steps the part, and that would reflect in the errata documentation.

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    Tesla DeLorean
    Guru
    March 12, 2017
    Posted on March 12, 2017 at 20:59

    Check SCB->CPUID

    printf('r%dp%d\n', ((SCB->CPUID >> 20) & 0x0F), (SCB->CPUID & 0x0F));

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    Imen.DBest answer
    ST Technical Moderator
    March 13, 2017
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    Tesla DeLorean
    Guru
    March 13, 2017
    Posted on March 13, 2017 at 15:43

    Ok, but what are the plans moving forward? Is the core going to be updated in future releases of the F74xxx and F75xxx products?

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    ST Technical Moderator
    March 14, 2017
    Posted on March 14, 2017 at 10:23

    Hi Clive,

    There is no plan for new device revision for F74xxx and F75xxx products.

    So, there is no plan to embed a new core revision.

    Thanks

    Imen

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