DMA USART1 problem

[fpmartin]

Posted on December 20, 2007 at 18:52

DMA USART1 problem

[16-32micros]

Posted on May 17, 2011 at 12:20

Dear fpmartin,

You can refer to our App Note AN2548 :'' Using the STM32F101xx and STM32F103xx DMA controller''

http://www.st.com/stonline/products/literature/an/13529.pdf

this may help you to design your system while using DMA with other peripherals. let us know if you need further details

Regards, STOne-32

[fpmartin]

Posted on May 17, 2011 at 12:20

I have run into a frustrating problem and would welcome any suggestions/insight. I have a high frequency interrupt from timer3 invoking an IRQHandler at about 100KHz (system clock is 64MHz). I also have USART1 set up for DMA on DMA channels 4 and 5. The USART is setup for full duplex RS-232 at 115200 baud. I have a host side program sending a 5 byte command over the USART. The main loop of the program replies with a 5 byte reply packet out the USART.

Here's the problem. If the TIM3 IRQHandler writes to any peripheral on APB2, it cause the DMA channel 4 (USART1_TX) to skip a byte every now and then - that is, it sends 4 bytes instead of 5. the DMA_CNDTR4 is always set to 5 and is never interfered with directly in any way during the transmission. APB2 HCLK is set to highest speed.

The TIM3 IRQHandler can do just about any thing else - write to APB1 peripherals, read and write to RAM, do large time consuming math operations, etc. without compromising the USART1_TX DMA, but as soon as you throw in a write to any APB2 peripheral - GPIOx, SPI1, ADC1, etc - it starts causing the occasional dropped byte.

It doesn't seem that I am violating duty cycle limitations on the APB2 bus but perhaps I'm missing something?