DMA and cpu simultaneous access to SRAM in stm32f407

[armindavatgaran]

Posted on May 27, 2015 at 20:24

Hello

Can DMA access SRAM at the same time the CPU is accessing it or vice versa?

Thanks.

[Tesla DeLorean]

Posted on May 27, 2015 at 20:35

Not exactly, access is arbitrated through the bus matrix.

[armindavatgaran]

Posted on May 27, 2015 at 20:52

So parallel access isn't possible?

Is it hardware related(SRAM access implementation limit)?

[Tesla DeLorean]

Posted on May 27, 2015 at 20:55

It's not a dual ported design, because that's significantly more complicated, and most of the time you aren't accessing at the ''same'' time. Access is serialized, so accesses occur one after another, depending on who came first, while not precluding either from timely access.