Dear all, I am working on FDCAN with STM32G473 and I do not understand the example calculation of the Baudrate in chapter 43.4.7 in the following document RM0440 Rev 2 (en.DM00355726.pdf)

[HUnso.1]

bit time = [NTSEG1 + NTSEG2 + 3] tq

And in the note

With a CAN kernel clock of 48 MHz, the reset value of 0x06000A03 configures the FDCAN

for a bit rate of 171 kbit/s.

NSJW = 6

NBRP = 0 => 1

NTSEG1 = 10

NTSEG2 = 3

How do you get 171 kbit/s by 48 MHz

Best Regards

Harald