DDS DAC

[manoritesameer]

Posted on August 08, 2014 at 07:49

Hello,

        I am generating a sine wave by DDS method, but I dont know why the signal is flattering at the bottom. 

      Does anyone have any idea why is this happening.

 Thanks

#stm32 #dac

[raptorhal2]

Posted on August 08, 2014 at 16:32

Look in the DAC section in the data sheet for your device. You will probably find that the DAC buffer amplifier is not rail to rail. The same problem will exist if the output is programmed to go to VRef+.

An unbuffered output can come closer to the rails, but the current drive is meager, usually requiring input to the high impedance pin of an external op amp.

Cheers, Hal

[manoritesameer]

Posted on August 08, 2014 at 20:50

Great that was helpful.... :)

[manoritesameer]

Posted on August 08, 2014 at 21:02

But now there seems a problem that 1 DAC is giving a 300mv lower output that the other for the same signal.

Regards

[raptorhal2]

Posted on August 08, 2014 at 22:33

Can't help much without more information. What is each DAC driving? Are you using bufferred or unbufferred output? What is the processor ? Are you using a development or discovery board ?

Think about what information you would need if you were asked to answer your question.

Cheers, Hal

[manoritesameer]

Posted on August 09, 2014 at 01:32

Thanks again,

       I am using the STM32F4 discovery board. I am using unbuffered for both the DACs. I am just probing at the pins no buffered input or output going to any pin. 

[raptorhal2]

Posted on August 09, 2014 at 02:10

Life can be very mysterious when you don't Read The Fine Manual.

Table 5 in the F4 Discovery User Manual shows PA4 and PA5 connected to onboard peripherals.

Cheers, Hal