Thanks again for your reply. I agree with you that the monitor command for watch-point is not supported by OpenOCD with-respect-to Cortex M3. However OpenOCD does support setting of hardware watchpoint through the Zn packet, where: Z2=> read watchpoint Z3=> write watchpoint Z4=> access watchpoint The 'Z' packets are sent by the gdb client when the watch point is applied by the commands: awatch/rwatch eg: awatch loop_count =>should set an access watchpoint at variable loop_countIt is implemented by the function cortex_m3_set_watchpoint() in the file cortex_m3.c. The function cortex_m3_set_watchpoint() duely sets the hardware registers (comparator, mask and function register). The DWT module is also enabled by OpenOCD by setting the TRCENA bit in the DEMCR register. After all this you would expect the cortex m3 to halt when a read/write/access to the specified memory location occurs. However the Cortex-M3 never halts. Hence if you think that the above function/code of OpenOCD is not correct, then that too needs to be fixed. However, before attempting to fix OpenOCD it would be worthwhile to know whether anyone has got the watch-point mechanism (provided by DWT unit) to work on STM32 hardware (and not simulator). Thanks and regards, Rahul
Finally I have been able to get the watch-point to work with stm32 using amontec jtag. It seems the issues I was getting were due to the cortex m3 getting in an unknown state. thanks for your assistance. -regards