CY62177EV30 SRAM with STM32L496AEI

[Atilla Mete Turedi]

Posted on October 19, 2017 at 09:53

Greetings people,

I was wondering if the SRAM by CY62177EV30  is compatible with the FMC on STM32L496AEI with 20 bit address width and 16 bit data width.

I can only use 20 bits from the address bus because of pin multiplexing constraints. There are 21 address pins on the SRAM I want to use so I am also unsure what to do with that. Is it okay not to connect that on SRAM? (I am aware this will result in halving of the total capacity of the SRAM)

Best Regards,

Mete

#stm32l496 #sram #stm32 #stm32l4 #stm32l #cy62177ev30 #fmc

[Atilla Mete Turedi]

Posted on October 27, 2017 at 12:32

Anyone on this?

[waclawek.jan]

Posted on October 27, 2017 at 13:01

Probably yes, it appears to be a fairly standard SRAM. The responsibility is ultimately yours, of course.

I can only use 20 bits from the address bus because of pin multiplexing constraints. There are 21 address pins on the SRAM

You could either tie it to H or L permanently and lose half of the capacity, or connect to any available GPIO and in program switch 'banks'  'manually'.

JW

[Atilla Mete Turedi]

Posted on October 27, 2017 at 13:09

JW thank you for your reply.

What if I connect it to one of the other chip selects of FMC Bank 1 instead? Can I fool the processor to believe that it is actually controlling two seperate SRAMs?

Regards,

Mete