Cube F4 V1.7.0, Timer interrupt macros

[vincenthamp9]

Posted on July 30, 2015 at 14:19

Hello

Is there a specific reason that the timer interrupt macros for clear flag (and respectivly clear interrupt since they are the same) don't have an &= operator?

#define __HAL_TIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER |= (__INTERRUPT__))
#define __HAL_TIM_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER |= (__DMA__))
#define __HAL_TIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER &= ~(__INTERRUPT__))
#define __HAL_TIM_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER &= ~(__DMA__))
#define __HAL_TIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR &(__FLAG__)) == (__FLAG__))
#define __HAL_TIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
#define __HAL_TIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
#define __HAL_TIM_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->SR = ~(__INTERRUPT__))

Currently the whole SR register except the flag you put in gets written?

[tm3341]

Posted on July 30, 2015 at 14:53

Writing zero to bit, clears flag.

So if you invert all bits you write, you write zero there where you wanna clear flag and other bits are one. So you clear only flag you want, others stay remain.

DATASHEET!

[vincenthamp9]

Posted on July 30, 2015 at 15:18

Well... thats only half the truth, the macro'd write a whole lot of ''1s'' to the SR register if it could...

The only reason it doesn't is that the bits in the SR register can't be set. The SR register is marked as ''rc_w0'' in the datasheet, which translates to:

''Software can read as well as clear this bit by writing 0. Writing ‘1’ has no effect on the bit value.''

I didn't find that part at first, sry.