Could Dual Quad Configuration be used with Quad SPI AP Memory on OctoSPI interface?

[gingerologist]

I wonder whether I can connect two quad spi ap memory to the same octospi interface on stm32h730 to double the bandwidth. Or such a configuration can only be used with nor flash, not psram. Thanks.

[Bowman32]

The OCTOSPI support the Dual-Quad PSRAM but in STM32H730 there is an errata related to OCTOSPI with AXI bus integration.

Does the used memory support DQS ? If yes, you have to enable DQS during write operations.

If no, the Dual-Quad PSRAM will not be supported.

Please refer to errata sheet ES0491 Rev 6 "STM32H72xx/73xx device errata". section 2.7.6 Memory-mapped write error response when DQS output is disabled.

[Alex - APMemory]

Let me add few comment about APMemory IoT RAM PSRAM possibilities:

As mentionned 2 QSPI (Dual Quad) could be used, but you may want to consider one DDR device supporting DQS, such as OPI (11 pin signals, x4 Bandwidth versus QSPI SQR) or QSPI DDR (7 pins signals, x2 Bandwidth versus QSPI SDR), rather than 2 devices of QSPI SDR.

Here would be some suggestions:

  - OPI is available from 64Mb to 512Mb in BGA24 or WLCSP (APS6408L, APS12808…, APS25608N…, APS51208N…)

 - QSPI DDR is sampling in 128Mb WLCSP (APS12804O-DQ-WA)

 - QSPI SDR is available from 16Mb to 128Mb, SOP8/USON8/WLCSP (APS1604M-…, APS6404L-…, APS12804O-…), but with a memory mapped write limitation on this specific MCU memory controller.

[Alex - APMemory]

OPI and QSPI DDR are supporting DQS. They have been checked on STM32H7A3/B3 & STM32H72x/3x platform. QSPI SDR (no DQS) have Memory Mapped Write limitation, as mentionned in errata sheet.

So recomended devices are :

• OPI : 64Mb to 512Mb in BGA24 or WLCSP (APS6408L, APS12808…, APS25608N…, APS51208N…)
• QSPI DDR: 128Mb WLCSP (APS12804O-DQ-WA)

Note: other platform such as STM32L5, STML4P5, STM32U5 doesn't have these limitation and can also support without limitation QSPI SDR ( 16Mb to 128Mb, SOP8/USON8/WLCSP (APS1604M-…, APS6404L-…, APS12804O-…)

Alex