Configuring interrupt pin using CMSIS

[Emper]

Currently I am trying to configure a second interrupt pin using CMSIS.

SYSCFG->EXTICR[1] = (SYSCFG->EXTICR[1] & ~SYSCFG_EXTICR2_EXTI6)|(0b0000 << SYSCFG_EXTICR2_EXTI6_Pos);

 EXTI->FTSR = EXTI_FTSR_TR6;

 EXTI->RTSR = EXTI_RTSR_TR6;

 EXTI->IMR = EXTI_IMR_MR6;

 NVIC_EnableIRQ(EXTI9_5_IRQn);

with void EXTI9_5_IRQHandler(void){} works.

But when I try to add another button for interrupt;

SYSCFG->EXTICR[0] = (SYSCFG->EXTICR[0] & ~SYSCFG_EXTICR1_EXTI3)|(0b0000 << SYSCFG_EXTICR1_EXTI3_Pos);

 EXTI->FTSR = EXTI_FTSR_TR3;

 EXTI->RTSR = EXTI_RTSR_TR3;

 EXTI->IMR = EXTI_IMR_MR3;

 NVIC_EnableIRQ(EXTI3_IRQn);

with void EXTI3_IRQHandler(void){}.

It doesn't do anything...

Why is it that the one above does work and the second one doesn't?

[waclawek.jan]

PA6 and PA3?

Which STM32 model? A "known good" board such as Nucleo/Disco, or something else?

Is PA3 properly connected? Can you see the input level change in respective bit of GPIOA_IDR? Isn't this pin set as Analog in GPIO?

Check in disasm, if the IRQ handler is properly inserted into the vector table.

JW

PS. Change your username to a normal nick.

[Emper]

Yes, it is PA6 and PA3.

Model is Nucleo F303RE. I guess it really is a software related issue..

GPIOA->MODER = (GPIOA->MODER & ~GPIO_MODER_MODER3)|(0b00 << GPIO_MODER_MODER3_Pos);

 GPIOA->PUPDR = (GPIOA->PUPDR & ~GPIO_PUPDR_PUPDR3)|(0b10 << GPIO_PUPDR_PUPDR3_Pos);

When pushing the button, the interrupt isn't even called

[waclawek.jan]

Can you see the level changes in IDR?

Is the ISR address inserted in the vector table?

JW

[Emper]

I think I can test the first one with a seperate program where I toggle a LED.

Not so sure how to test the second question?

[waclawek.jan]

On Nuclea64, PA3 is connected to STLink's virtual-comm Tx. See the Nucleo's UM1724. Disconnect SB14.

JW

[Emper]

Didn't know how to disconnect SB14.

I tried changing everything to PC01, still doesn't work.

When I write a program to turn on / off a LED it works fine, so the pin itself is configured right.

The problem lays in the configuration of the interrupt.