Compatibility doubts about I2C SCL SDA between a Slave (STM32L0) with VDD=3V3 & a Host with VDD=1V8 , pull-up resistors on the Host side.

[tlamotte9]

Dear ST Community,

I do have a doubt regarding an I2C communication between my STM32L031K6Tx that is the slave and powered with VDD=3V3 and a host that is powered with 1V8. Pull-up resistors are connected to 1V8 (host side).

I did a functional test and it seems to work but I still have doubts.

Would the STM32L031 SDA and SCL be compatible with an input high level of 1V8 maximum (i.e. the host VDD) according to the STM32L031 VDD=3V3?

I do not know where to check it in the STM32 datasheet if this would be confirmed or not.

Is anyone could help me to confirm it?

Thanks in advance for your help,

Best regards

Thierry

[Andrew Neil]

"I do not know where to check it in the STM32 datasheet"

Look at the Logic High/Low thresholds in the GPIO electrical specs; also check Absolute Maximum ratings.

I2C Level Translators are available ...

[TDK]

> Would the STM32L031 SDA and SCL be compatible with an input high level of 1V8 maximum (i.e. the host VDD) according to the STM32L031 VDD=3V3?

1.8V is not guaranteed to be logic high on a 3.3V system, so it is not guaranteed to work.

 

2.31V is required for logic high on a 3.3V system. 1.8V is not guaranteed to be high or low.

[tlamotte9]

Dear TDK,

I do thank you for your answer. It was also my reading of the datasheet but since it seemed to work well even though when I stressed it a lot, I had doubts.

So OK : To fully guarantee it I will add a level adaptation between 1V8 and 3V3 domains for both SDA and SCL lines.

Again deep thank for your help on that

Kind regards

Thierry