Clock for ULPI PHY?

[eleventen]

Posted on February 16, 2012 at 22:17

Greetings,

We're having a hard time telling whether or not the STM32F207 will drive the clock for the PHY.  There is a sentence in the datasheet that says, vaguely

   External HS or HS OTG operation supporting ULPI in SDR mode. The OTG PHY is

connected to the microcontroller ULPI port through 12 signals. It can be clocked using

the 60 MHz output.

Does this mean we have to use one of the MCO outputs?  Or will the ULPI clock be driven at 60MHz?

[Tesla DeLorean]

Posted on February 16, 2012 at 22:31

We're having a hard time telling whether or not the STM32F207 will drive the clock for the PHY.  There is a sentence in the datasheet that says, vaguely

 

 

External HS or HS OTG operation supporting ULPI in SDR mode. The OTG PHY is connected to the microcontroller ULPI port through 12 signals. It can be clocked using the 60 MHz output.

 

 

Does this mean we have to use one of the MCO outputs?  Or will the ULPI clock be driven at 60MHz?

Or PA.5 OTG_HS_ULPI_CK

12-pin interface

CLK    PA5

DIR    PI11

STP    PC0

NXT    PH4

D0    PA3

D1    PB0

D2    PB1

D3    PB10

D4    PB11

D5    PB12

D6    PB13

D7    PB5

[eleventen]

Posted on February 16, 2012 at 23:27

We're having a hard time telling whether or not the STM32F207 will drive the clock for the PHY.  There is a sentence in the datasheet that says, vaguely

 

 

External HS or HS OTG operation supporting ULPI in SDR mode. The OTG PHY is connected to the microcontroller ULPI port through 12 signals. It can be clocked using the 60 MHz output.

 

 

Does this mean we have to use one of the MCO outputs?  Or will the ULPI clock be driven at 60MHz?

Or PA.5 OTG_HS_ULPI_CK

According to the UPLI spec, this line can be driven by the MCU or the PHY.  We just want to know that the MCU *does* drive it.  The RCC clock tree doesn't give me any place to configure a PLL or divider to get the 60MHz clock.

[Tesla DeLorean]

Posted on February 16, 2012 at 23:54

''The USB OTG HS (60 MHz) clock which is provided from the external PHY''

The STUPLI01B outputs 60 MHz, generated via it's external 26MHz crystal

http://www.st.com/internet/analog/product/189049.jsp

Presuming your part is running at 120 MHz,

MCO1 = PLL / 2,  60 MHz

MCO2 = PLL / 2,  60 MHz

MCO2 = SYSCLK / 2, 60 MHz