CL1 & CL2 Value for Crystal (HSE)

[sam239955]

Posted on February 29, 2012 at 16:49

Hi,

I have chosen this 25Mhz Crystal to be my next HSE:

 

http://at.farnell.com/abracon/abm8g-25-000mhz-18-d2-t/crystal-25mhz-18pf-smd/dp/1788523#similarProducts

Datasheet: http://www.abracon.com/Resonators/ABM8G.pdf

How I calculate the HSE CL1 & CL2 Value? I remember to not take the 18pF Value from the Datasheet, there was a formular:

http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/APPLICATION_NOTE/CD00221665.pdf

so:

Cstray is 4 pF  (i dont know but its a common value)

CL is 18pF

so CL - CStray = 14pF

then CL1=CL2= 28pF

am I correct with that?

WR

Alex

[raptorhal2]

Posted on March 01, 2012 at 19:01

From the datasheet, CL for your selected crystal is 10 pF, so CL1 & CL2 = 12 pF

Cheers, Hal

[John F.]

Posted on March 02, 2012 at 08:55

ST AN2867 gives useful information and a formula for calculating the ''Gain Margin''. You have chosen a very small crystal with a higher ESR of up to 70 Ohms. I think that the gain margin is only just over 5 for this crystal (5 is recommended). In general, larger crystal package sizes will have lower ESR. The risk is your choice might work in your prototype but in production PCBs, the crystal might not always begin oscillating. Please have a look at the Application Note.

[sam239955]

Posted on March 05, 2012 at 11:20

Hi John,

Thanks for the Information. Do you know a good 25Mhz crystal which I can replace with my selection?

Like this ? two times bigger http://at.farnell.com/aker/c7s-25-000-12-3030-x/kristall-5x7mm-smd-keramik-25-000mhz/dp/1538821

WR

Alex

@Hal,

no the crystal has 18pF CL

  ah I see farnell has the wrong datasheet linked.

[emalund]

Posted on March 05, 2012 at 15:01

You do not state which chip, so if your chip (I know no such ARM) does not have a PLL this will be irrelevant.

why do you use such a high frequency? the EMI will be much more than you would get with a lower freq XTAL and corresponding PLL settings.

Erik

[Tesla DeLorean]

Posted on March 05, 2012 at 18:24

why do you use such a high frequency?

Probably the ability to get 25 MHz out for Ethernet applications, which would otherwise require a second crystal. The STM32's PLL, and clocking scheme, is sufficiently inflexible that picking crystals with magic values (specialized applications, yet mass produced) often out weighs other considerations.

[donald2]

Posted on March 05, 2012 at 18:52

Specifically, you should prefer a crystal frequency that matches the HSI clock.  That is 8MHz for the 32F1xx chips, and 16MHz for the 'F4 chips.  This simplifies start-up from sleep.

The reasons to use a different frequency are using Ethernet, USB, or I2S, or you want an odd sampling rate from the ADC.

My understanding is that production designs start with a ''usual suspect'' load capacitor for the prototype, then pick a final value based on the observed frequency.

For small-scale work it's simpler to just use a bigger HC49 crystal and 18pf capacitor, then check that the crystal starts up in a reasonable time.  Having the HSI clock immediately available and a HSE Ready status bit in RCC_CR makes this easy to do in firmware on the STM32.

[sam239955]

Posted on March 07, 2012 at 11:31

I'm using a STM32F407, I chose a 25MHz because the Std.Periph.Lib is made for 25MHz HSE. I can go with a 8Mhz as shown on the Discovery F4, but I have to change the Lib's alltime. This is not such a big Problem but i thought it would be better.

I want to use the Ethernet too. But It would be no Problem to implement a second crystal.

RG

Alex