Chaining STM32 and FPGA JTAG ports

[cosmapa]

Posted on January 19, 2008 at 12:15

Chaining STM32 and FPGA JTAG ports

[cosmapa]

Posted on May 17, 2011 at 12:18

Is it OK to share the JTAG connector with both an STM32 and an FPGA?

The circuit would be as follows:

JTAG Connector TDI -> STM32 TDI -> STM32 TDO -> FPGA TDI -> FPGA TDO -> JTAG Connector TDO.

Would the IAR tool be able to still work with the FPGA in the chain?

[francis]

Posted on May 17, 2011 at 12:18

The STM32 TAPs are standard, and they support chaining.

Don't know whether IAR supports chaining (OK with the Raisonance RLink), but I guess they do...

Note that if you need to describe the chain for your FPGA, you will have to declare 2 TAPs in the STM32.

[slawcus]

Posted on May 17, 2011 at 12:18

What about other ST micros such as STR9? I know this is STM32 forum, but the topic was created here.

[16-32micros]

Posted on May 17, 2011 at 12:18

Dear Cosmap, Francis,

I confirm that our STM32 is standard and could be chained to other JTAG compatible devices ( for more details refer to RM0008 reference Manual Section 2.4 and Section 2.5 ). Here (attached) I'm designing a board with both STM32 and a small CPLD from Altera and I'm using Altium designer Tool and it is working fine where I'am able to connect to both STM32 and CPLD.

For IAR and Keil I beleive that they support this configuration in their tool in addition to Raisonance and you can ask them in their forums ( www.iar.com & www.keil.com )if they have a specific configuration file for that, if it is fixed manually and not detected upon connection.

[16-32micros]

Posted on May 17, 2011 at 12:18

It should be the same for STR9 and STR7 devices as well.