Can STM32F446MCY6TR erase flash and exucute code in same time?

[Yurii Stukalo]

Posted on June 16, 2018 at 22:57

I would like to use STM32F446MCY6TR  in my new device and for me not clear if can the uC STM32F446MCY6TR  executed code in time when erasing a part of flash before write some configuration parameters or the core full stop exeucute any instructions until erasing/writing operation will not finish?

Thanks. 

#stm32f4-flash

[Tesla DeLorean]

Posted on June 16, 2018 at 23:31

It basically stalls out by inserting wait-states until complete.

Some STM32 devices support multi-bank FLASH which would allow normal functioning of the opposing bank during write/erase.

You may also put your code, vectors, and irq handlers in RAM, and provided nothing executing touches FLASH you can run real-time code that doesn't stall.

[Yurii Stukalo]

Posted on June 17, 2018 at 00:10

I know what some 

STM32 devices support multi-bank FLASH I just would like make sure if the 

STM32F446MCY6TR  not support it as I did not find the information  in reference manula, I found only that: 

3.5 Erase and program operations For any Flash memory program operation (erase or program), the CPU clock frequency (HCLK) must be at least 1 MHz. The contents of the Flash memory are not guaranteed if a device reset occurs during a Flash memory operation. Any attempt to read the Flash memory on STM32F4xx while it is being written or erased, causes the bus to stall. Read operations are processed correctly once the program operation has completed. This means that code or data fetches cannot be performed while a write/erase operation is ongoing.

Is I am correct that STM32F446MCY6TR   which the

 devices NOT support multi-bank FLASH?

Thanks.

[Tesla DeLorean]

Posted on June 17, 2018 at 00:34

Single bank device

http://www.st.com/content/ccc/resource/technical/document/reference_manual/4d/ed/bc/89/b5/70/40/dc/DM00135183.pdf/files/DM00135183.pdf/jcr:content/translations/en.DM00135183.pdf