Can I use DMA1 in Memory-to-peripheral mode to transfer a data over USART2?

[ABart.1]

I'm lerning Cortex-M7 (stm32f722) and I don't fully understand how DMA1 works. On the one side DMA1 not connected with AHB therefore PORTs and SRAM not available. On the other side in datasheet didn't type that Peripheral-to-memory and Memory-to-peripheral modes not available for DMA1. Can I use DMA1 in Memory-to-peripheral mode that transfer a data over USART2? Thanks!

[Piranha]

DMA (Direct Memory Access) without memory access? ;) Take a look on AN4667 "Figure 1. STM32F7 Series system architecture".

The RM0431 "Table 26. DMA1 request mapping" clearly shows USART2 on channel 4 of streams 5 and 6.

[ABart.1]

But SRAM connected to AHB BUS. And DMA1 not available AHB BUS. Or I don't right?

[Piranha]

The place, you encircled, literally shows that the DMA1 is also connected to the same AHB bus matrix.

[waclawek.jan]

Yes you can use DMA1 to access USART2, which is on APB1:

JW

[Tesla DeLorean]

Whilst it is not true on all STM, the STM32F2/4/7 the DMA1 associates with APB1, and the "Peripherals" on that bus, and DMA2 to APB2. But here DMA2 also supports Memory-to-Memory which has broader reach, but also involves more bus cycles/sequencing to "load-then-store" across different or conflicting paths, whereas others more direct/local actions can be done in a "feed-thru".

Also peripherals on APB1 can trigger action on DMA1, like UART or TIM

By localizing traffic you can avoid conflicting, and slowing, other usage, most especially code execution