Can I turn off the FMC prefetcher without turning off the cache?

[KMaen]

I was struggling for a while to do a deep dissect of the cache behavior of my STM32F7508-DK device.

Especially, when accessing SDRAM connected to FMC, the performance behavior was weird

(some was much better than the others while the code looked semantically equivalent--even considering architectural components).

After digging for a while, I found evidences to believe that the hardware prefetcher maybe the culprit.

I found here (https://www.st.com/content/ccc/resource/technical/document/application_note/group0/bc/2d/f7/bd/fb/3f/48/47/DM00272912/files/DM00272912.pdf/jcr:content/translations/en.DM00272912.pdf) that I can turn off the prefetcher by changing the memory attribute to strongly-ordered. However, from the same doc it seems like making the memory strongly-ordered would also turn off the cache (Table 4).

I really want to only turn off the prefetcher while keeping the cache on. Does anyone know if this is possible?

Maybe at this point this became more of an obsession of mine than a productive exploration, but I want to confirm that the prefetcher was the culprit as I expected...

Thank you!

[waclawek.jan]

The speculative prefetch is directly related to the L1 cache, you can't have one without the other.

In ARM Cortex-M7, you don't have any specific control over the behaviour of cache. Take it or leave it.

JW

[Piranha]

The speculative prefetch is not directly related to cache. It's there because the CPU is dual issue - while one execution unit, for example, evaluates the condition, the other simultaneously loads the data for the predicted branch.