CAN_ESR LEC[2:0] Error meanings

[DJC]

These are the CAN error codes listed in RM0008 (Manual for STM32F1)

Is there anywhere in documentation that says what they actually mean in detail?

Are these detected on RX or TX. I assume that in this case its TX and, while active an error frame will be ejected. If so is this info also in the error frame?

000: No Error

001: Stuff Error

010: Form Error

011: Acknowledgment Error

100: Bit recessive Error

101: Bit dominant Error

110: CRC Error

111: Set by software

Even with re-transmission disabled, I can see these errors (such as Bit recessive) happening. However, at the same time, I see all the packets arriving at the destination.

[turboscrew]

I think those are quite clear if you have read CAN specs.

Stuff error means that bit stuffing is not done right.

Acknowledgement error means that receiving end doesn't acknowledge the frame.

Bit dominant/recessive means that there is a "0" when there should have been "1" or vice versa.

...

[DJC]

Yes, thanks. I understand.

But actually I'm at a point where i need to nail down specific meaning on exactly what's happening and when.

Is this on TX or RX?

What is form error exactly?

Does anything in the MCU set 111 without me specifically having to write to this register? if so what?

Will each of these actually eject an error frame.

"Bit dominant/recessive means that there is a "0" when there should have been "1" or vice versa." - Which one is which. It makes a difference in terms to knowing what hardware you need to change in order to adjust your bus impedance.

So, which can spec did you read to get more detail?

Is this made clear in ISO 11898-1: 2015 ?

I would like to know its made clear in there before i go and buy that document.