BOR vs PVD Detection Logic
- We have seen PVD triggers when there is transient load of 1A added on the 3.3Vdc (loaded additional to our design through electronic load) and it triggers when the transient load dips the 3.3V for duration of ~450 micro seconds.
- We have seen BOR triggers when there is transient load of 1A added on the 3.3Vdc (loaded additional to our design through electronic load) and it triggers when the transient load dips the 3.3V for duration of ~196 micro seconds.
Why there is difference in detection logic? What is lowest pulse or transient dip the voltage detection logic will detect?
Is there any filtering in the PVD detection circuit internal to MCU? Is it same with BOR detection circuit?
- We see PVD programming has some amount of filtering for any transient glitches and its detection circuit behaves bit differently than BOR detection circuit, Why there is a difference?
- Is it BOR reset triggers, when the VDD has some glitch or the BOR detection circuit will look for some stabilized time to which the VDD threshold will be monitored to trigger a reset?
What is the timing, or a transient response to which BOR & PVD will be immune to..?
@Fred and @Jocelyn RICARD Can you please forward this query to the Expert in this Voltage Monitoring ??
@Community member Can you able to help here ??
I tried going through manuals, but still not clear on difference of the above two behavior ??
