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CWedg.1
Associate II
May 22, 2024
Question

Bootloader on STM32H503RB via USB

  • May 22, 2024
  • 6 replies
  • 2551 views

We wish to bootload a STM32H503RB using USB. This works on the NUCLEO-H503RB, but after resetting the processor on our PCB with BOOT0 high windows reports "Device Descriptor Request failed".

AN2606 states that CRS is enabled for the DFU to allow USB to be clocked by HSI48 48 MHz, but is there anything CRS needs to work?

 

 

6 replies

MM..1
Chief III
May 23, 2024

Maybe show schematics , seems some hw fail on your pcb

CWedg.1
CWedg.1Author
Associate II
May 23, 2024

Schematic.png

CWedg.1
CWedg.1Author
Associate II
May 23, 2024

USB socket and processor are within 30 mm, D+ and D- both have 2 or 3 vias. We have tried remove the IP4220CZ6 and behaviour did not change.

MM..1
Chief III
May 23, 2024

D+ D- is USB differential pair must meet wired impedance and length minimum difference on pcb...

CWedg.1
CWedg.1Author
Associate II
May 23, 2024

In case it matters PC14/OSC32_IN drives a HC logic device. Shorted pin to 0V (so it wouldn't try and lock to noise) and still got the USB error.

CWedg.1
CWedg.1Author
Associate II
May 28, 2024

CWedg1_0-1716883458834.pngCWedg1_1-1716883740086.png

Impedance could be improved, but I believe this should be sufficient for FS (12 MHz) performance. Total distance is less than 25 mm.

 

CWedg.1
CWedg.1Author
Associate II
June 3, 2024

Still trying to find a solution to this and I have found something that confuses me. Table 6 of AN4879 Introduction to USB hardware, etc has a "-" in the entry for crystal-less USB for the STM32H503, but RM0492 Reference manual for STM32H503 line MCUs section 11 says that the clock recovery system can synchronise using SOF on the USB bus, presumably from the USB Host or the 32kHz LSE.

 

 

CWedg.1
CWedg.1Author
Associate II
June 3, 2024

The processor on the MB1814B Nucleo board is labelled RBT6U, but the processors we have are labelled RBT6. What does the "U" mean?