Boot from SRAM

[l yk]

Posted on October 23, 2017 at 10:49

I have a question about the stm32f103xx. I want to know how it boots from Embeded SRAM. I have known that the IBUS of Cortex-M3 can't access the SRAM from the reference manual. When boots from the SRAM,  how Cortex-M3 fetches instructions from SRAM?

[Amel NASRI]

Posted on October 23, 2017 at 19:03

Hi

?,

The following table in

http://www.st.com/content/ccc/resource/technical/document/reference_manual/59/b9/ba/7f/11/af/43/d5/CD00171190.pdf/files/CD00171190.pdf/jcr:content/translations/en.CD00171190.pdf

describes how to configure the Boot pins to boot from SRAM:

-Amel

[Tesla DeLorean]

Posted on October 23, 2017 at 19:10

The F1 however does have some quirky behaviour in that it executes the ResetHandler at a specific address, not the one in the vector table.

The F1 can definitely run code from RAM, I usually copy the code there rather than boot into it

[waclawek.jan]

Posted on October 23, 2017 at 19:29

Code can be fetched through S-bus, there's no problem in that.

The tricky part is the reset vector, which have to be at 0x0000004. 'F1 can't remap RAM, and RM0008 mysteriously says ' STM32F10xxx microcontrollers implement a special mechanism to be able to boot also from SRAM'.

The F1 however does have some quirky behaviour in that it executes the ResetHandler at a specific address, not the one in the vector table.

I'd lοve to hear the dιrty details.

Jan