Assymetric Timer output [STM32G031]

[b.a.]

Hi,

I am playing around with Timers on Nucleo-G031 at 64MHz clocked from HSI and PLL.

I use TIM1 with AutoReload of 6 and Capture/Compare Value of 3 to create an 9.17MHz 50% duty-cycle signal.

The signals turns out to have 46.4ns high-pulse and 62.8ns low-pulse, which is quite assymetric

Any ideas where this comes from, and what to do as a remedy?

Can this be caused by using internal resonator? Or to ask the other way round: will an external crystal yield better results?

[LCE]

That is perfectly fine with your settings:

9.17 MHz = 64 MHz / (ARR + 1)

and with an odd maximum of ARR + 1 (because CNT = 0 is a valid value) you will never get 50% duty cycle.

So change ARR to an odd value.

HSI itself is not so accurate, depending on the application it might be too jittery.

[gbm]

ARR value of 6 yields the period of 7 cycles and CCR value of 3 gives 3/7 duty. STM32G series TIM1 may be clocked at 128 MHz - try to use this feature.

[b.a.]

Ohhh... ********...

Thank you for pointing this out to me!

I studied the datasheet a bit further and found that the center-aligned mode might as well suit the need for a symetrical, 50% duty-cycle signal.

Will definetly try the 128MHz clock, this might be helpful for another problem!

Thanks!

[waclawek.jan]

You don't need center-aligned mode for 50% duty cycle PWM. Use odd ARR values, or use the Toggle mode instead of PWM.

JW

[b.a.]

and yet more possibilities, thanks!

May I ask why you don't recommend center-aligned mode?