Been looking closely at RM figures 342 AND 343.....I cannot see the value of the ARPE bit....when 1 it looks like the shadow register updates on UEV / or Interrupt and when 0 what?? 342 disregards showing the shadow register and on top of this who cares that it loads early when ARPE = 0.....
Can someone please explain the value of this bit?
Effect of ARPE gets visible most if you write ARR to a value lower than is the current value of CNT. In that case, as Update occurs when CNT==ARR, timer keeps counting up until it reaches its top value (0xFFFF or 0xFFFF'FFFF) and rolls over to 0.
More nuanced uses of ARPE involve simultaneous writes to ARR and CCRx, synchronized actions on several timers, etc.
JW
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