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Visitor II
July 8, 2026
Question

AN4776 question

  • July 8, 2026
  • 2 replies
  • 74 views

Hello,

I dont understand in the AN4776, page 66 the following:

 

/****** Master mode configuration: Trigger update mode *******

/ /* Trigger of TIM2 Update into TIM1 Slave */

TIM1->CR2 &= ~ TIM_CR2_MMS;

TIM2->CR2 |= TIM_TRGO_UPDATE;

 

why TIM1? 

there should have to mask the TIM2 master settings, before setting TRGO update, or i mistake? Moreover the TIM1 have been already set and active.

2 replies

TDK
July 9, 2026

> why TIM1? 

This is a probably a typo. It should use TIM2. Although the field is clear on reset so this has no effect either way unless the field was previously set to something.

> there should have to mask the TIM2 master settings, before setting TRGO update, or i mistake?

It’s hard to understand what you are asking here. What is shown is not the full configuration. It is only the master mode configuration. Specifically, it sets the MMS field within the CR2 register. That is all that it does.

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waclawek.jan
Super User
July 9, 2026

Yes it’s obviously a typo.

However, looking at AN4776, I couldn’t but comment.

Examples in AN4776 are written in a style I consider ugly and wouldn’t recommend, for 2 particular reasons:

  1. registers are to be written at once, and preferentially only directly written by a constant (possibly constructed by a series of ORs of the individual bitfield), if there’s no particular reason to perform a read-modify-write
  2. no external libraries/headers ought to be used except the CMSIS-mandated device headers.

In the given snippet - where 2. is violated by using symbols from Cube/HAL, which are unnecessarily extensive, generated haphazardly without adhering to terminology/abbreviation already established in RM, and are under control of ST rather than the user (read: they are free to change anything in them at a whim) - that would mean

TIM2->CR2 = (0b010 << TIM_CR2_MMS_Pos); // 0b010 for Update

or, if we intend to do more extensive work with timers

// this should've come from ST, but they did not care
// so we put this possibly somewhere in our custom header "stm32f4xx_augment.h"
#define TIM_CR2_MMS__RESET 0b000
#define TIM_CR2_MMS__ENABLE 0b001
#define TIM_CR2_MMS__UPDATE 0b010
// etc

TIM2->CR2 = (TIM_CR2_MMS__UPDATE << TIM_CR2_MMS_Pos);

The seemingly superfluous bracketing is here to maintain a certain culture, e.g. if we would want to fill more than one field we would bitwise-or such brackets together.

YMMV

JW