ADC via DMA conversion time on Nucleo-C031C6
Hello,
I have an issue with the ADC conversion timing while using the DMA controller.
I have only configured 1 ADC channel, 12b res. and the ADC clock is at 24MHz (50% of SYSCLK), and it shows correct conversion results (verified by a simple voltage divider).
However, I tried timing it and it takes 6.6us with optimization on. The datasheet shows 0.4us per conversion. I am using theHAL_ADC_Start_DMA() function. My timer starts right before it and stops in the HAL_ADC_ConversionCpltCallback() function. Is this timing the result of abstraction layer overhead, or am I missing something?
Thanks! :)
