ADC readings are saturated while analoge signal is below reference voltage

[MReic.1]

Hi together,

I have ADC reading issues with my STM32G431. I read the ADC with DMA. The readings are triggered by a burst of pulses (approx. 750 kHz) and the ADC buffer seems to get filled. However, the ADC readings are way to high.

A 2.5 voltage regulator is connected to VDDA. As you can see in the appended Scope-Screenshot the analog signal which I feed into the ADC (CH2) is lower than the reference voltage of the VDDA (CH1). The bursts of pulses is shown on CH3. But all the reading (except a few readings at the beginning and a few readings at the end) are 4095. So I do not understand why it is so. All the time the analog signal is below the ref signal.

The settings of the ADC is appended as well. I hope you guys can help me. I am out of ideas how to fix my problem.

[waclawek.jan]

Reference voltage must be clean and stable, and well decoupled. Read AN5346.

JW

[TDK]

From your plot, looks like VDDA is around 2.3V, which is a fair bit off from 2.5V. The pulses seen on that line are not reassuring. Do you have enough bulk capacitance?

Custom board? Is VREF+ = VDDA?

[MReic.1]

Thank you for the reply!

@Community member​ @TDK​  The reference voltage is much cleaner than it looks like. The rinning is due to the bad probing.

@TDK​ Yes, VDDA is a bit off. But it does not matter for my application. Yes it is a custom board. VDDA is defined as VREF+, isn´t it? In the appendix you can see the ref voltage generation. Additionally, it is decoupled with 100n next to the VDDA pin. Do I have to activate VDDA as ADC reference in code? I thought it´s done with the checkbox, shown in my ADC-settings appendix.

Edit:

In my used package Vref+ and VDDA shares the same pin. Do I have to change the functionality to Vref+ in code or is it done by the shown checkbox in my ADC settings?

[TDK]

> Yes, VDDA is a bit off. But it does not matter for my application.

I only mention it because it's significantly off of what a voltage reference should be, so perhaps something is pulling it down or there is another hardware issue. But I see it's an LDO, and not a true voltage reference, so possibly within acceptable range.

I don't see a problem with what you're doing. You don't need to "activate" VREF+, it should be the default reference. Perhaps run a known working ADC example from the CubeMX repo to verify the ADC. You could monitor VREFINT to eliminate some unknowns.

[MReic.1]

@TDK​  Thank you for the reply.

I found the issue. During the first pulse burst, the voltage was actual over Vref. After the first burst I did not restart the DMA correctly. So the ADC reading got never be updated. Thank you for all the hints