Access via Debug Port on STM32H563/573

[tmtoaele]

I am accessing the STM32H563/573 via SWD through the debug port.
My ultimate goal is to access the flash registers to perform write/erase operations on the 2MB flash memory and configure the option bytes.
I have a few questions regarding this process:

・I want to halt the CPU before releasing the RESET signal.

　Specifically, I intend to:
　Set C_DEBUGEN in DHCSR to 0b1.
　Set VC_CORERESET in DEMCR to 0b1.

　However, I was unable to write to or read from the following registers:
　(Writing results in an error, and reading returns a value that is impossible given the register configuration.)

　DHCSR : 0xE000_EDF0
　DEMCR : 0xE000_EDFC

　Please explain the cause of this issue and suggest a workaround.

・According to the reference manual, the factory default value for FLASH_OPTSR2_CUR is 0xB400_170, with TZEN[7:0] set to 0xB4, meaning TrustZone is enabled.

　However, when I read FLASH_OPTSR2_CUR from a microcontroller in its factory-shipped state, the value was 0xC300_017C, with TZEN[7:0] set to 0xC3, meaning TrustZone is disabled.

 

　Is the default value stated in the reference manual incorrect?

[KDJEM.1]

Hello ​@tmtoaele and welcome to the community;

 

Thank you for bringing issue to our attention.

I reported this issue internally for checking.

Internal ticket number CDM0064894 (This is an internal tracking number and is not accessible or usable by customers).  

 

Thank you.

Kaouthar

[KDJEM.1]

Hello ​@tmtoaele;

 

After checking internally, the default value of FLASH_OPTSR2_CUR register is the value forced into the register if the OBL fails.

 

Thank you.

Kaouthar