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idrissmc
Associate III
February 3, 2020
Solved

64Mbit accessible

  • February 3, 2020
  • 6 replies
  • 1376 views

Hi everyone,

why they mentioned (64Mbit accessible only) in QSPI?

This topic has been closed for replies.
Best answer by Tesla DeLorean

It says it for the SDRAM, not the QSPI

Why, because they used a 32-bit wide SDRAM due to price, availability or physical size/package, but they only have 16-bit of the data bits wired up, due to pin availability on the STM32 side. Consequently half the available capacity is lost.

The 32-bit wide SDRAM may be significantly cheaper because it's used in 100M quantities in some phone, tablet, or PC application.

6 replies

Tesla DeLorean
Tesla DeLoreanBest answer
Guru
February 3, 2020

It says it for the SDRAM, not the QSPI

Why, because they used a 32-bit wide SDRAM due to price, availability or physical size/package, but they only have 16-bit of the data bits wired up, due to pin availability on the STM32 side. Consequently half the available capacity is lost.

The 32-bit wide SDRAM may be significantly cheaper because it's used in 100M quantities in some phone, tablet, or PC application.

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idrissmc
idrissmcAuthor
Associate III
February 3, 2020

Oh lol I’m not good today, I thought for QSPI, sorry, then if it’s only the half is available! Supposed if I do, let say, a considerable application on this board, it won’t work? For example it might tell me SDRAM overflowed or something like that?

Tesla DeLorean
Guru
February 3, 2020

If you tell the linker you have 8MB (64Mbit) of SDRAM, it will tell you if/when you exceed the capacity.

If your application needs more SDRAM than that, you'd need to consider a different board to do the proof-of-concept on.

The SDRAM should be more than sufficient to sustain the screen buffer(s) for the 480x272 display.

I would generally avoid the SDRAM for code or stack as it is slower, and contended, the cache may hide most of this on the F7

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idrissmc
idrissmcAuthor
Associate III
February 3, 2020

>> I would generally avoid the SDRAM for code or stack as it is slower, and contended, the cache may hide most of this on the F7.

its very interesting this sentence, but I can’t understand it, can you explain me what do you mean please?