2 Different I2S codec with one STM32 MCU possbile????

[delphi]

Posted on June 16, 2016 at 11:36

Hello. In a very specific project I have to use 2 different I2S codecs one for input and another for output. Is it possible to do it in 1 project on same CPU? The frequencies are different. And the Data type is seems to be too.

In manu datasheets I can only understand that I2S not a hardware interface and use the SPI. It seems that it is as IP core inside CPU, but can this approach trigger to differen codecs?

[waclawek.jan]

Posted on June 16, 2016 at 11:58

Which mcu?

JW

[delphi]

Posted on June 17, 2016 at 09:29

I choose between stm32f411RE, stm32l476rg.

[waclawek.jan]

Posted on June 17, 2016 at 10:38

''One input and one output'' appears to imply two half-duplex devices. These are usually not labelled as ''codec'', rather, as ''ADC'' and ''DAC''. Is this your case? What particular parts do you intend to use?

The ''traditional'' approach in STM32 is that some of the SPI modules have a halfduplex I2S mode. Sometimes they have a coupled dedicated slave I2S unit (marked as I2Sext), which provides then a full-duplex capability.

As far as clocking is concerned, the main clock for SPI/I2S may come from a dedicated PLL, or from an external clock coming in through a dedicated pin (which can be used e.g. if the codec is the source of main/master clock). In some devices e.g. the 'F405/407/415/417 this clock is shared among all (SPI/)I2S modules, so their input clock can't be different; however, they still have individual dividers for this clock so the master/bit/sample clocks can be different, but all stemming from the same higher-frequency origin. I don't know well the 'F411, but it appears to follow this scheme, for all its 5 SPI/I2S modules (of which 2 have the coupled I2Sext so capable of full-duplex). Whether this scheme works for you is up to you to decide.

The 'L4 appears not to have these combined SPI/I2S modules, i.e. their SPI modules are ''pure'' SPI. OTOH, it has two SAI modules, one mode of which is I2S mode. I have no experience with them, but they appear to be completely individually clocked from two dedicated PLLs.

JW