STSPIN32G4 MCP Protocol Get Register Oddities

[Vasalic]

I’ve noticed that the order of the registers seems to matter. I would like an explanation as to why this is the case and if there is anything documented on this front.

Specifically if you want to request the following registers: 25, 89, 1425, 2649, 7001, 73

It appears that for some reason or another 73 must be last. If you request the above registers with 73 being anywhere but the last register it seems to cause the G4 to lock up and stop responding to any MCP or ASPEP commands. You also seem to be unable to recover without power cycling the core.

Valid Order: 25, 89, 2649, 7001, 1425, 73
->e9 00 00 b0
->11 00 19 00 59 00 59 0a 59 1b 91 05 49 00
<-4a 01 00 f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2e 00 00 00

Invalid Order: 25, 89, 73, 2649, 7001, 1425

->e9 00 00 b0
->11 00 19 00 59 00 49 00 59 0a 59 1b 91 05

No response and the G4 hangs...

Somehow it seems that the ST Motor Pilot is aware of this as it does place all the STATE register last in the packet.

Motor Pilot v6.4.2

Motor Control Workbench v6.4.2
STM FW v1.6.2
STM32CubeMX 6.18.0

[GMA]

Hello ​@Vasalic,

STATUS is an 8-bit register (see the register_interface.h file).

Data must be 16-bit aligned (see the Motor Control Protocol Suite chapter in the user manual, available from Workbench tool > About > Documentations > Documentation, for more details), and STATUS cannot be inserted between 32-bit or 16-bit registers.

[Vasalic]

Hi @GMA,

This does not explain packets:

 

Valid Packet(25, 89, 2649, 7001, 1425, 73):

->e9 00 00 b0
->11 00 19 00 59 00 59 0a 59 1b 91 05 49 00

Specifically the payload in order is the following:

0x1100 - Motor Id 1 and Command Id 2

0x1900 - Register 25 

0x5900 - Register 89

0x590a - Register 2649

0x591b - Register 7001

0x9105 - Register 1425

0x4900 - Register 73

 

Invalid Order(25, 89, 73, 2649, 7001, 1425):

->e9 00 00 b0
->11 00 19 00 59 00 49 00 59 0a 59 1b 91 05

Specifically the payload in order is the following:

0x1100 - Motor Id 1 and Command Id 2

0x1900 - Register 25 

0x5900 - Register 89

0x4900 - Register 73

0x590a - Register 2649

0x591b - Register 7001

0x9105 - Register 1425

 

As you can see these are both aligned to 16 bit? 

Note my machine endianness is different from the target and I am translating things back into the correct order. Example 0x1900 is actually 0x0019 on my local machine. However as you can see things are aligned on a 16 bit boundary so I am at a bit of a loss and still looking for an explanation here.

[GMA]

Hello ​@Vasalic,

Refer to the response format.
On MC Pilot Terminal display: