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DWiśn.1
Associate II
Dec 6, 2022 9:07 AM UTC
Solved

What is the correct Vector Table base offset in HAL library STM32Cube FW_H7 V1.10.0 (STM32H730VB)?

I have two projects: 

·                both on microcontroller STM32H730VB;

·                both created in STM32CubeIDE Version: 1.10.1 with HAL library STM32Cube FW_H7 V1.10.0;

·                HAL version in file stm32h7xx_hal.c: STM32H7xx HAL Driver version number V1.11.0

I want to set Vector Table offset, but one project comment claims “Vector Table base offset field. This value must be a multiple of 0x200.�? when in the other, “Vector Table base offset field. This value must be a multiple of 0x300.�?

I also find information that the “0x300�? version is incorrect: https://github.com/STMicroelectronics/STM32CubeH7/issues/246 but with no confirmation.

I suspect an error at the level of file generation by the Cube, but I need to know which offset value is correct. 

This topic has been closed for replies.
Pavel A.
Pavel A.Best answer
Dec 6, 2022 9:25 PM UTC

The ARM v7 RM says: "The Vector table must be naturally aligned to a power of two whose alignment value is greater than or equal to (Number of Exceptions supported x 4), with a minimum alignment of 128 bytes."

To get the "Number of Exceptions supported" take the greatest IRQn in the MCU specific header file. Example for STM32H730: Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h730xx.h, TIM24_IRQn = 162). Add to this 16 (the number of special exceptions) and multiply by 4 (sizeof u32).

Round up to a power of two. This gives 0x400.

4 replies

TDK
Dec 6, 2022 8:43 PM UTC

It should be a multiple of 0x200 (or maybe 0x400). If you want an official source, you can find it within Cortex-M7 documentation.

Take the size of the vector table and round it up to the nearest power of 2.

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Pavel A.
Pavel A.Best answer
Dec 6, 2022 9:25 PM UTC

The ARM v7 RM says: "The Vector table must be naturally aligned to a power of two whose alignment value is greater than or equal to (Number of Exceptions supported x 4), with a minimum alignment of 128 bytes."

To get the "Number of Exceptions supported" take the greatest IRQn in the MCU specific header file. Example for STM32H730: Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h730xx.h, TIM24_IRQn = 162). Add to this 16 (the number of special exceptions) and multiply by 4 (sizeof u32).

Round up to a power of two. This gives 0x400.

Tesla DeLorean
Guru
Dec 6, 2022 9:56 PM UTC

Try writing/reading SCB->VTOR, should be a bunch of the low order bits STZ (Stuck-at-Zero)

The NVIC substitutes the low order bits to generate a vector load, it doesn't have an adder circuit

Listing say 0x2CC is the end (H723), so 0x400 boundaries

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DWiśn.1
DWiśn.1Author
Associate II
Dec 7, 2022 7:22 AM UTC

Thank you all for your replies and for pointing me to the relevant documentation. I calculated this based on the IRQs number and got 0x400, but the various comments confused me.