STM32U585 Rev W: Shutdown after repeated STOP2 cycles prevents wake-up, sometimes including NRST

[coolebyak]

Hello,

I am investigating a low-power issue on a custom board with an STM32U585CIU6, silicon revision W, using the LDO regulator and FreeRTOS.

During normal operation, the MCU periodically enters STOP2 from the FreeRTOS tickless idle hook. When the user selects power off, the application saves its state, powers down the display and enters Shutdown.

The wake source is PB8 / WKUP5, input selection 2, active low. It is connected to the open-drain INT output of a TMAG5273 magnetic sensor. The sensor remains powered and is configured for autonomous Wake & Sleep measurements with a latched threshold interrupt.

Original failure

After entering Shutdown from the full application:

• The magnetic button did not wake the MCU.
• External NRST also failed to recover the device.
• ST-LINK could not connect, including connect-under-reset at a low SWD frequency.
• Cycling the board power restored operation.

The NRST signal was physically checked. NRST worked normally before the failure.

The original problem occurred with both Debug and Release firmware.

Attempts to resolve it

1. Checked the wake configuration.
   Immediately before Shutdown, PB8 was high and the registers showed:

   PWR->WUCR1 = 0x10
   PWR->WUCR2 = 0x10
   PWR->WUCR3 = 0x200

   The PB8 pull-up for Shutdown was enabled. Clearing wake flags and STOPF did not resolve the failure.

2. Stopped FreeRTOS and interrupt sources before Shutdown.
   Suspended the scheduler, stopped SysTick and the HAL timebase, disabled and cleared NVIC interrupts, reset the peripheral blocks, and used a one-way transition from the task PSP to MSP before executing WFI. This did not resolve the failure.

3. Returned the clocks closer to reset configuration.
   Disabled Flash prefetch and ICACHE, switched SYSCLK to MSIS at 4 MHz, and disabled PLLs and other high-speed oscillators before Shutdown. The failure remained.

4. Disabled STOP2 completely during normal operation.
   Used ordinary Sleep between tasks while retaining actual Shutdown for power off. With this change, both magnetic wake-up and NRST worked.

5. Restored STOP2, but blocked it throughout Shutdown preparation and added orderly peripheral shutdown.
   Stopped ADC and peripheral DMA requests, suspended/reset all GPDMA1 and LPDMA1 channels with bounded waits, stopped timers, reset peripherals and disabled their clocks.

   This restored NRST recovery, but magnetic wake-up still failed. In this state:

   • TMAG5273 INT remained high even when the magnet was applied.
   • Manually pulling the PB8 trace to ground also failed to wake the MCU.

Working workaround

A standalone minimal firmware, without FreeRTOS, display initialization or previous STOP2 cycles, successfully entered Shutdown and woke from the magnetic sensor.

I therefore implemented a reset-based handoff in the application:

1. Save application state and shut down peripherals.
2. Store a one-shot magic value and sensor configuration in RTC/TAMP backup registers.
3. Perform a software reset.
4. During early startup, consume and clear the marker.
5. Reinitialize and arm the TMAG5273, then enter actual Shutdown before starting FreeRTOS or entering STOP2.

With this approach, magnetic wake-up and NRST both work, while STOP2 remains enabled during normal operation.

Is there a known limitation or a required cleanup sequence when entering Shutdown after repeated STOP2 cycles on STM32U585 Rev W?

I checked ES0499 §2.2.22 concerning reset during STOP2 with LDO and RAM power-down. However, earlier register snapshots showed PWR->CR2 = 0 and PWR->CR3 = 0, so I have not established that its conditions apply.

I would appreciate guidance on any additional PWR, RCC, wake-up or peripheral state that must be restored before entering Shutdown.

[Khaled_DHIF]

Hello ​@coolebyak ,

I haven’t found an STM32U585 erratum that says you need to reset the MCU before entering Shutdown after using STOP2. The PWR values you shared look consistent with WKUP5 being enabled for an active-low signal, but they don’t show whether another wake event or peripheral was still active just before Shutdown.

It may help to compare the state at that point in two runs: one after a fresh boot, and one after several STOP2 cycles. Check the wake-up flags, pending interrupts, DMA activity, and PB8’s level. A debugger can change low-power timing, so if the problem only happens without it attached, save those values to retained memory and check them after reboot instead.

ES0499 2.2.22 doesn’t sound like an obvious match if `PWR->CR2` and `PWR->CR3` were zero under the conditions described in the erratum, but it’s worth checking the latest wording. Since NRST sometimes doesn’t recover the device either, I’d also check the supply, NRST, and PB8 signals during a failure.

Kind regards,

DHIF Khaled