STM32L431 I2C Slave Transmit: AddrCallback(Read) -> ErrorCallback(AF) -> ListenCpltCallback, Master receives only 0xFF

[y.hara]

Hello,

I am using an STM32L431 as an I2C Slave and an RL78/G13 as an I2C Master.
I am trying to transmit data from the STM32L431 (Slave) to the Renesas RL78 (Master).

When the RL78 performs an I2C read operation, the following callback sequence is observed on the STM32:
 1 HAL_I2C_AddrCallback(Direction = Read)
 2 HAL_I2C_ErrorCallback(ErrorCode = 4)
 3 HAL_I2C_ListenCpltCallback()

Inside the AddrCallback I start the transmission using:
 HAL_I2C_Slave_Seq_Transmit_IT(hi2c, tx_buffer, tx_length, I2C_FIRST_AND_LAST_FRAME);
The function returns HAL_OK.

The transmit buffer contains a simple incrementing pattern, length 20 byte:
 01 02 03 04 05

The STM32 reports that transmission has completed:
 XferSize = 20
 XferCount = 0

However, immediately afterwards the ErrorCallback is called with:
 TextErrorCode = 4

According to stm32l4xx_hal_i2c.h this corresponds to:
 HAL_I2C_ERROR_AF (Acknowledge failure / NACK).
On the RL78 side, the receive buffer does not contain the transmitted data.
 Expected: 01 02 03 04 05 ...  Actual:FF FF FF FF FF
which does not match the transmit buffer.

Additional observations:
 1. AddrCallback is entered correctly with TransferDirection = Read.
 2. HAL_I2C_Slave_Seq_Transmit_IT() returns HAL_OK.
 3. Listen mode is restarted after ListenCpltCallback().
 4. RL78 interrupt count indicates that the master expects all bytes to be transferred.

My main questions are:

Is the callback sequence
 1 AddrCallback(Read)
 2 -> ErrorCallback(HAL_I2C_ERROR_AF)
 3 -> ListenCpltCallback

Expected for a normal master read transaction?
 1. Can HAL_I2C_ERROR_AF occur after all bytes have already been transmitted successfully?
 2. Under what conditions would XferCount reach zero while the master still receives only 0xFF?
 3. Is there any known issue or required configuration when using HAL_I2C_Slave_Seq_Transmit_IT() in listen mode on STM32L431?

Any suggestions for debugging this issue would be greatly appreciated.
Thank you.

[Saket_Om]

Hello ​@y.hara 

 1. Can HAL_I2C_ERROR_AF occur after all bytes have already been transmitted successfully?

No HAL_I2C_ERROR_AF should not occur when all bytes have been transmitted. 

2. Under what conditions would XferCount reach zero while the master still receives only 0xFF?

Did you check what happen on the bus using logic analyzer? 

Are you using an external pullup resistor ? 

[y.hara]

Saket_Om-san,

Thank you for your quick reply.

 

1. I do not have a logic analyzer available at the moment, and being perchased.

   Therefore, we are investigating mainly by software and debugger.

 

2. External pull-up 4.7k ohm resistors are mounted on both SDA and SCL lines.

 

3.  AddrCallback(Read) -> ErrorCallback(HAL_I2C_ERROR_AF) -> ListenCpltCallback occurs every transaction.

    In HAL_I2C_Slave_Seq_Transmit_IT(), the transfer buffer contains valid test data(increment pattern 1..20), and XferCount 

    reaches zero.

   However, the RL78 master always receives 0xFF data only.

 

Could HAL_I2C_Slave_Seq_Transmit_IT() be completed internally while no actual data is driven onto the bus under some conditions?

 

Thank you,