[STM32L4] [FMC-NAND_FLASH] Integrating NAND Flash with FatFS

[sunny]

Posted on August 24, 2016 at 14:25

Hi,

I am using STM32L4 and have generated code from CubeMX for FMC-NAND Flash along with FatFS (User-defined) options enabled.

But the User-defined FatFS calls are empty (USER_initialize(), etc) in the user_diskio.c.

I understand that the logic for this needs to be implemented for NAND Flash using the API's provided in the stm32l4xx_hal_nand.c.

But it would really be great if someone can share any documents or sample code or application note for the same.

Also, from

/public/STe2ecommunities/mcu/Lists/STM32Java/Flat.aspx?RootFolder=https://my.st.com/public/STe2ecommunities/mcu/Lists/STM32Java/STM32CubeMX%20NAND%20STM32F2&FolderCTID=0x01200200770978C69A1141439FE559EB459D758000F9A0E3A95BA69146A17C2E80209ADC21&currentviews=55

link, it is mentioned that there is a bug in the HAL_NAND_Address_Inc(), and it is reported to ST Internal Team, but there is no confirmation about the suggested fix. It would be great if the bug is valid and there exists a solution for it.

Thanks,

Sunny 

#fatfs #stm32l4 #fmc #nand

[Walid FTITI_O]

Posted on August 24, 2016 at 14:40

Hi bhayani.sunny,

As mentioned in

http://www.st.com/content/ccc/resource/technical/document/user_manual/10/c5/1a/43/3a/70/43/7d/DM001047pdf/files/DM001047pdf/jcr:content/translations/en.DM001047pdf

:

“NOR and NAND Flash memory are not supported. In this case, the user shall select the FatFs user-defined mode and update the user_diskio.c driver file generated to implement the interface between the middleware and the selected peripheral.�?

To succeed in user_diskio.c update you can get help from these threads: thread1

https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/user_diskio.c%20and%20diskio.c&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B&currentviews=204

-Hannibal-

[sunny]

Posted on August 25, 2016 at 06:30

Hi Hannibal,

Thank you for the reply.

Can you please provide link to thread1, that you have mentioned ?

Also can you please comment on the thread where the bug is reported for HAL_NAND_Address_Inc() ?

Thanks,

Sunny

[Walid FTITI_O]

Posted on August 25, 2016 at 17:57

Hi bhayani.sunny,

The link missed is [DEAD LINK /public/STe2ecommunities/mcu/Lists/STM32Java/Flat.aspx?RootFolder=/public/STe2ecommunities/mcu/Lists/STM32Java/How%20can%20I%20interface%20STM32Cube_FW_F1_V1.0.0%20FatFs_uSD%20with%20SPI2%20on%20STM32F107&FolderCTID=0x01200200770978C69A1141439FE559EB459D758000F9A0E3A95BA69146A17C2E80209ADC21&TopicsView=https://my.st.com/public/STe2ecommunities/mcu/Lists/STM32Java/AllItems.aspx&currentviews=10]thread1.

Yes, the bug mentionned on this [DEAD LINK /public/STe2ecommunities/mcu/Lists/STM32Java/Flat.aspx?RootFolder=/public/STe2ecommunities/mcu/Lists/STM32Java/STM32CubeMX%20NAND%20STM32F2&FolderCTID=0x01200200770978C69A1141439FE559EB459D758000F9A0E3A95BA69146A17C2E80209ADC21&currentviews=58]thread is already submitted and you can considerate it for STM32L4 also.

-Hannibal-

[Tesla DeLorean]

Posted on August 25, 2016 at 19:48

Large block NAND devices will be a headache to use for writing with FatFs. Understand clearly what you're trying to do, and what it is going to take to implement it.

[sunny]

Posted on August 26, 2016 at 06:02

Hi Clive and Hannibal,

Thanks for the replies.

@Clive: Can you please elaborate, I did not get you. My current NAND Flash is 33,792 Mbits, having 8192 Blocks, each Block comprises of 128 Pages and the Page size is of 4KBytes.

So does the 8192 Blocks mean more ?

Is using FatFS with this NAND Flash size recommended (Please give your recommendations/suggestions) ?

I have one more query:

I am trying to modify the FMC_PCR register, but it seems it is not taking any value. After HAL_NAND_MspInit(), it is having a constant value of 0x00410040. In the Reference Manual, it is mentioned that the Reset Value of this register is 0x00000018. But I am seeing the value of this register as 0x0.

Can you please let me know if I am missing anything here to get the default reset value of this PCR register and also how to modify the register value.

Awaiting your reply.

Thanks,

Sunny