STM32G474 HRTIM Fault Threshold Does Not Match Comparator Threshold

[PSBH]

 

I am seeing behavior on an STM32G474 that I cannot explain and would appreciate if anyone has seen this before.

Setup

• MCU: STM32G474 (Nucleo-G474RE)
• COMP6
   
  • Positive input: PB11 (COMP6_INP / ADC1_IN14)
  • Negative input: DAC2_CH1
• HRTIM Fault 3 source: Internal Fault (FLT_Int) from COMP6
• Fault filter: Disabled
• Fault counter threshold: 0
• Fault polarity: Active High

DAC Configuration

DAC2_CH1 configured as:

• Normal mode
• Connected to on-chip peripherals only
• Output buffer disabled

Runtime code updates DAC2 every 1 ms:

HAL_DAC_SetValue(&hdac2,

                 DAC_CHANNEL_1,

                 DAC_ALIGN_12B_R,

                 dac_value);

Verification Performed

1. Verified COMP6 configuration registers.
2. Verified DAC2 DOR register contains expected value.
3. Verified HRTIM Fault3 is the only enabled fault source.
4. Disabled ADC sampling on PB11 (no change).
5. Verified fault polarity behavior.
6. Verified comparator output on a GPIO pin.

Observation

When monitoring the COMP6 output pin directly, the comparator switches at the expected voltage.

Example:

• DAC2 = 2481
• Expected threshold ≈ 2.0 V
• COMP6 output switches at ≈ 2.0 V

However, PWM shutdown through HRTIM Fault3 occurs significantly earlier.

Example measurements:

DAC2 Code	Expected Threshold	PWM Fault Occurs
1000	~0.80 V	~0.40 V
2000	~1.60 V	~1.18 V
2481	~2.00 V	~1.53 V
3000	~2.40 V	~1.96 V

The fault point tracks DAC value approximately linearly, but with a substantial offset from the actual comparator threshold.

Question

Has anyone seen a case where:

• COMP output transitions at the correct threshold,
• but HRTIM Fault sourced from the same comparator trips significantly earlier?

Is there any internal path, synchronization, fault conditioning, blanking, or errata that could cause the HRTIM fault decision point to differ from the comparator output transition point?

Any suggestions on additional registers or signals to monitor would be appreciated.

[PSBH]

The error appears to be an almost fixed offset of about 0.4 V, not a proportional gain error. Across multiple DAC values, the HRTIM fault occurs at approximately:
PWM fault voltage ≈ expected COMP threshold - 0.4 V