section `.bss' will not fit in region `RAM1'

[Pilous Droip]

I have this attribute in my code:

#define PHY_ETHTORAM_ATTRIBUTE	 __attribute__ ((section(".sram2"), aligned(4)))

And for example, in my code:

// Ethernet Rx MA Descriptor
volatile __attribute__((aligned(32))) PHY_ETHTORAM_ATTRIBUTE ETH_DMADescTypeDef DMARxDscrTab[RXBUF];
 
..........

And I have this problem:

Output/test.elf section `.bss' will not fit in region `SRAM1'

And I know, that this problem is in linker script...

And my memory is here:

/*
 * STM32F427ZIT6 memory map - GNU ld linker script file
 */
 
MEMORY
{
 FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
 CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 64K
 SRAM1 (rw) : ORIGIN = 0x20000000, LENGTH = 112K
 SRAM2 (rw) : ORIGIN = 0x2001C000, LENGTH = 16K
 BKPSRAM (rw) : ORIGIN = 0x40024000, LENGTH = 4K
}
 
INCLUDE Linker/Sections.ld

And Sections.ld is in attachment.

Complete error messages are here:

• make: *** [Output/MU-Core.elf] Error 1
• Output/test.elf section `.bss' will not fit in region `SRAM1'
• recipe for target 'Output/test.elf' failed
• region `SRAM1' overflowed by 24672 bytes
• section .sram2 VMA [2001c000,2001fcff] overlaps section .bss VMA [200000c0,20021c5f]

Any idea, how to change linker script to function code? And what actually happened?

[alister]

The error's saying

1. There's more being mapped to SRAM1 than will fit.
2. The .sram2 section is being mapped to SRAM2.

Check the linker map file. It'll have a .map extension. If you can't find it, it may have to be turned on.

Perhaps you've accidentally overdimensioned or put something in the wrong section. You'll find that by reading the map file carefully.

If there are no errors in the code, the map file will show if and where there's some space. If you find space, you might determine what you can move there using the same method you used to put DMARxDscrTab[RXBUF] into SRAM2.

[Pilous Droip]

I have a map file. Is in the attachment. But I don't know what I'm looking for?

Can you help me?

[waclawek.jan]

You're looking for the part starting with

.bss           0x200000c0   0x21ba0

               0x200000c0               __bss_start__ = .

               0x200000c0               _sbss = .

and ending with

 *(.bss_end .bss_end.*)

               0x20021c60               . = ALIGN (0x4)

               0x20021c60               __bss_end__ = .

               0x20021c60               _ebss = .

you want also look at noinit and the ._check_stack after that - the result should not "overhang" into sram2.

The biggest consumption there is heap_sram1 0x8000 and buffers? in  ./LIBRARY/ETH-STM32-LwIP/MODULE/src/core/memp.o

0x13253 . Those two alone fill almost completely sram1.

JW

[Pilous Droip]

I have heap_sram1 declare here:

/* heap for FreeRTOS */
static __attribute__ ((aligned (64))) uint8_t heap_sram1[32 * 1024];
const HeapRegion_t xHeapRegions[] = {
		{ heap_sram1, sizeof(heap_sram1) },
		{ NULL, 0 }
};
 
/* and in main */
vPortDefineHeapRegions( xHeapRegions );

And other size is for LWIP:

#define MEM_SIZE (16*1024)

I tried to modificate it, and program is now build OK. But program crashed here:

vApplicationMallocFailedHook

And my modification is:

/* memory modification */
 
#define MEM_SIZE (2*1024)
 
static __attribute__ ((aligned (64))) uint8_t heap_sram1[8 * 1024];
const HeapRegion_t xHeapRegions[] = {
		{ heap_sram1, sizeof(heap_sram1) },
		{ NULL, 0 }
};

[alister]

Like LW's saying. These are the addresses and sizes of the large ones.

 .bss.heap_sram1

        0x200008c0   0x8000 ./Main/main.o

 COMMON     0x200088cc   0x1478 ./HW/serial/serial_port.o

 COMMON     0x2000a5a4   0x4013 ./LIBRARY/ETH-STM32-LwIP/MODULE/src/core/mem.o

 COMMON     0x2000e5b8  0x13253 ./LIBRARY/ETH-STM32-LwIP/MODULE/src/core/memp.o

Many of lwIP's buffers can be tuned in STM32CubeMX.

[Pilous Droip]

Yes, it is true. I modificated lwipopts.h and now MCU is working with ETH. :grinning_face: