NUCLEO-H7S3L8 USB_OTG_HS Host Issue: TXERR during EP0 SETUP

[wooseong]

I am currently using the NUCLEO-H7S3L8 CN2 Type-C port as a USB_OTG_HS embedded PHY host/source.

The TCPP03 source path opens successfully, and both the USB stick attachment and port reset are working. After the reset, HPRT reads 0x00001005, which seems to indicate speed=HS and that the port is enabled.

However, during the first EP0 SETUP GET_DESCRIPTOR request:

• HAL_HCD_HC_SubmitRequest() = HAL_OK

• HAINT = 0x00000001

• HCINT = 0x00000080

• TXERR = 1

• xfer_count = 0

The exact same issue occurs even during a raw HAL EP0 smoke test, prior to involving USBX/FileX.

I would like to verify the following points:

1. What is the mandatory clock/power initialization sequence when using the USB_OTG_HS embedded PHY host on the H7S3L8?

2. Is it acceptable to use HSI → PLL3Q for the USBPHYC clock, or is an HSE strictly required?

3. What are the necessary settle/wait conditions after enabling USBHSREG?

4. Are there any required CC/UCPD configurations for the CN2 Type-C/TCPP03 source setup, apart from the PM9 PWR_EN + TCPP03 provider gate?

5. Is the state where HPRT = 0x00001005 and HCFG = 0x00000201 considered normal under these conditions?

[wooseong]

Update:

I tested the USBPHY reference clock and USB HS regulator related points suggested by similar H7RS/N6 USBPHYC issues.

Current HSI -> PLL3Q -> USBPHYC path:

• USBPHY clock source: PLL3Q

• USBREF forced/logged as 24 MHz

• CCIPR1 = 0x00002a40

• USBPHYCSEL = 0x00002000

• USBREFCKSEL = 0x00000a00

• USBHSREGEN = 1

• USB33RDY = 1

• GOTGCTL after HAL_HCD_Start() = 0x002c0000

However, the first EP0 SETUP still fails with:

• HAINT = 0x00000001

• HCINT = 0x00000080

• TXERR = 1

• xfer_count = 0

I also tested HSE-based USBPHYC clock presets.

HSE preset:

• HSERDY = 0

• PLL3RDY = 0

• USBPHYC clock setup failed with HAL status 0x03

HSE bypass preset:

• HSERDY = 0

• PLL3RDY = 0

• USBPHYC clock setup failed with HAL status 0x03

So I could not yet verify USBPHYC using the board HSE. The current working-but-failing path is still HSI -> PLL3Q -> USBPHYC 24 MHz, where the first EP0 SETUP fails with TXERR.

According to UM3276, the NUCLEO-H7S3L8 default HSE source should be the on-board 24 MHz X1 crystal. Is there any board revision, solder bridge, boot configuration, or power condition that would make HSERDY stay 0 on a default NUCLEO-H7S3L8?

Also, is HSI -> PLL3Q -> USBPHYC 24 MHz expected to be reliable enough for USB_OTG_HS embedded PHY host mode, or should HSE be considered mandatory in practice?

[FBL]

Hi ​@wooseong 

Would you attach minimum firmware to reproduce the issue?

[wooseong]

Hi,

Thank you for your reply.

I prepared and attached a minimum firmware package to reproduce the issue.

The intended test flow is:

1. bring up CN2 as USB Host/Source,

2. enumerate and mount the USB MSC device,

3. open INPUT.WAV from the USB stick,

4. copy it byte-for-byte to OUTPUT.WAV.

The WAV file is not parsed or processed; it is only used as a normal test file. The purpose is to isolate the USB Host MSC / USBX / HCD / Type-C path from the original application.

A few notes for reproducing:

• Board: NUCLEO-H7S3L8

• STM32Cube_FW_H7RS_V1.3.0

• XSPI2_HSLV=1 option byte is required

• The official CDC_Standalone example enumerates correctly on CN2 as a USB serial device on my board

• This minimum firmware uses HSE 24 MHz for USBPHYC

• CN2 VBUS/source path is enabled through PM9/TCPP03

• TCPP03 is detected on I2C3 at address 0x68

Current result:

• HSERDY=1

• USBPHYC HSE/24 MHz clock setup succeeds

• TCPP03 source path setup succeeds

• The USB root port detects the device connection and the port reset completes

• USBX reports UX_DEVICE_CONNECTION

• Enumeration then fails before VID/PID are read

• The failure happens around the EP0 control transfer / SET_ADDRESS stage

• HCD channel 0 ends with URB_ERROR, xfer_count=0

So the firmware currently does not reach the FileX mount or the actual INPUT.WAV copy step because USB enumeration fails first.

If ST already has a USB Host MSC example for the NUCLEO-H7S3L8 board, even a simple one that reads a file from a USB stick, I would be very grateful if you could share it or point me to it. I can then compare my initialization sequence against the official reference.

[FBL]

Hi ​@wooseong 

Apologies for the delayed response, and thank you for sharing the minimal firmware package.

This is very helpful. Can you confirm CDC_Standalone example in host mode is working as expected on the Nucleo H7S3?

I found two ST reference examples that may be useful as a baseline for the USB Host MSC path:

• X-CUBE-AZRTOS-H7RS /Projects/STM32H7S78-DK/Applications/USBX/Ux_Host_MSC

• STM32CubeH7RS /Projects/STM32H7S78-DK/Applications/USB_Host/MSC_RTOS

These examples are for STM32H7S78-DK, not NUCLEO-H7S3L8, but they should still help you compare the USB host, USBX, and MSC initialization sequence.